cacheflush.h (8d58b66ed2b000f27658c88a4ed70e8042e86a58) cacheflush.h (67a3e8fe90156d41cd480d3dfbb40f3bc007c262)
1#ifndef _ASM_X86_CACHEFLUSH_H
2#define _ASM_X86_CACHEFLUSH_H
3
4/* Caches aren't brain-dead on the intel. */
5#include <asm-generic/cacheflush.h>
6#include <asm/special_insns.h>
7#include <asm/uaccess.h>
8

--- 75 unchanged lines hidden (view full) ---

84int set_pages_x(struct page *page, int numpages);
85int set_pages_nx(struct page *page, int numpages);
86int set_pages_ro(struct page *page, int numpages);
87int set_pages_rw(struct page *page, int numpages);
88
89
90void clflush_cache_range(void *addr, unsigned int size);
91
1#ifndef _ASM_X86_CACHEFLUSH_H
2#define _ASM_X86_CACHEFLUSH_H
3
4/* Caches aren't brain-dead on the intel. */
5#include <asm-generic/cacheflush.h>
6#include <asm/special_insns.h>
7#include <asm/uaccess.h>
8

--- 75 unchanged lines hidden (view full) ---

84int set_pages_x(struct page *page, int numpages);
85int set_pages_nx(struct page *page, int numpages);
86int set_pages_ro(struct page *page, int numpages);
87int set_pages_rw(struct page *page, int numpages);
88
89
90void clflush_cache_range(void *addr, unsigned int size);
91
92#define mmio_flush_range(addr, size) clflush_cache_range(addr, size)
93
92#ifdef CONFIG_DEBUG_RODATA
93void mark_rodata_ro(void);
94extern const int rodata_test_data;
95extern int kernel_set_to_readonly;
96void set_kernel_text_rw(void);
97void set_kernel_text_ro(void);
98#else
99static inline void set_kernel_text_rw(void) { }

--- 4 unchanged lines hidden (view full) ---

104int rodata_test(void);
105#else
106static inline int rodata_test(void)
107{
108 return 0;
109}
110#endif
111
94#ifdef CONFIG_DEBUG_RODATA
95void mark_rodata_ro(void);
96extern const int rodata_test_data;
97extern int kernel_set_to_readonly;
98void set_kernel_text_rw(void);
99void set_kernel_text_ro(void);
100#else
101static inline void set_kernel_text_rw(void) { }

--- 4 unchanged lines hidden (view full) ---

106int rodata_test(void);
107#else
108static inline int rodata_test(void)
109{
110 return 0;
111}
112#endif
113
112#ifdef ARCH_HAS_NOCACHE_UACCESS
113
114/**
115 * arch_memcpy_to_pmem - copy data to persistent memory
116 * @dst: destination buffer for the copy
117 * @src: source buffer for the copy
118 * @n: length of the copy in bytes
119 *
120 * Copy data to persistent memory media via non-temporal stores so that
121 * a subsequent arch_wmb_pmem() can flush cpu and memory controller
122 * write buffers to guarantee durability.
123 */
124static inline void arch_memcpy_to_pmem(void __pmem *dst, const void *src,
125 size_t n)
126{
127 int unwritten;
128
129 /*
130 * We are copying between two kernel buffers, if
131 * __copy_from_user_inatomic_nocache() returns an error (page
132 * fault) we would have already reported a general protection fault
133 * before the WARN+BUG.
134 */
135 unwritten = __copy_from_user_inatomic_nocache((void __force *) dst,
136 (void __user *) src, n);
137 if (WARN(unwritten, "%s: fault copying %p <- %p unwritten: %d\n",
138 __func__, dst, src, unwritten))
139 BUG();
140}
141
142/**
143 * arch_wmb_pmem - synchronize writes to persistent memory
144 *
145 * After a series of arch_memcpy_to_pmem() operations this drains data
146 * from cpu write buffers and any platform (memory controller) buffers
147 * to ensure that written data is durable on persistent memory media.
148 */
149static inline void arch_wmb_pmem(void)
150{
151 /*
152 * wmb() to 'sfence' all previous writes such that they are
153 * architecturally visible to 'pcommit'. Note, that we've
154 * already arranged for pmem writes to avoid the cache via
155 * arch_memcpy_to_pmem().
156 */
157 wmb();
158 pcommit_sfence();
159}
160
161static inline bool __arch_has_wmb_pmem(void)
162{
163#ifdef CONFIG_X86_64
164 /*
165 * We require that wmb() be an 'sfence', that is only guaranteed on
166 * 64-bit builds
167 */
168 return static_cpu_has(X86_FEATURE_PCOMMIT);
169#else
170 return false;
171#endif
172}
173#else /* ARCH_HAS_NOCACHE_UACCESS i.e. ARCH=um */
174extern void arch_memcpy_to_pmem(void __pmem *dst, const void *src, size_t n);
175extern void arch_wmb_pmem(void);
176
177static inline bool __arch_has_wmb_pmem(void)
178{
179 return false;
180}
181#endif
182
183#endif /* _ASM_X86_CACHEFLUSH_H */
114#endif /* _ASM_X86_CACHEFLUSH_H */