sbus.c (18ffa418aead13c56515ac74cd26105102128aca) sbus.c (61c7a080a5a061c976988fd4b844dfb468dda255)
1/*
2 * sbus.c: UltraSparc SBUS controller support.
3 *
4 * Copyright (C) 1999 David S. Miller (davem@redhat.com)
5 */
6
7#include <linux/kernel.h>
8#include <linux/types.h>

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58{
59 struct iommu *iommu = dev->archdata.iommu;
60 struct of_device *op = to_of_device(dev);
61 const struct linux_prom_registers *regs;
62 unsigned long cfg_reg;
63 int slot;
64 u64 val;
65
1/*
2 * sbus.c: UltraSparc SBUS controller support.
3 *
4 * Copyright (C) 1999 David S. Miller (davem@redhat.com)
5 */
6
7#include <linux/kernel.h>
8#include <linux/types.h>

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58{
59 struct iommu *iommu = dev->archdata.iommu;
60 struct of_device *op = to_of_device(dev);
61 const struct linux_prom_registers *regs;
62 unsigned long cfg_reg;
63 int slot;
64 u64 val;
65
66 regs = of_get_property(op->node, "reg", NULL);
66 regs = of_get_property(op->dev.of_node, "reg", NULL);
67 if (!regs) {
68 printk(KERN_ERR "sbus_set_sbus64: Cannot find regs for %s\n",
67 if (!regs) {
68 printk(KERN_ERR "sbus_set_sbus64: Cannot find regs for %s\n",
69 op->node->full_name);
69 op->dev.of_node->full_name);
70 return;
71 }
72 slot = regs->which_io;
73
74 cfg_reg = iommu->write_complete_reg;
75 switch (slot) {
76 case 0:
77 cfg_reg += 0x20UL;

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282 afar = upa_readq(afar_reg);
283
284 /* Clear primary/secondary error status bits. */
285 error_bits = afsr &
286 (SYSIO_UEAFSR_PPIO | SYSIO_UEAFSR_PDRD | SYSIO_UEAFSR_PDWR |
287 SYSIO_UEAFSR_SPIO | SYSIO_UEAFSR_SDRD | SYSIO_UEAFSR_SDWR);
288 upa_writeq(error_bits, afsr_reg);
289
70 return;
71 }
72 slot = regs->which_io;
73
74 cfg_reg = iommu->write_complete_reg;
75 switch (slot) {
76 case 0:
77 cfg_reg += 0x20UL;

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282 afar = upa_readq(afar_reg);
283
284 /* Clear primary/secondary error status bits. */
285 error_bits = afsr &
286 (SYSIO_UEAFSR_PPIO | SYSIO_UEAFSR_PDRD | SYSIO_UEAFSR_PDWR |
287 SYSIO_UEAFSR_SPIO | SYSIO_UEAFSR_SDRD | SYSIO_UEAFSR_SDWR);
288 upa_writeq(error_bits, afsr_reg);
289
290 portid = of_getintprop_default(op->node, "portid", -1);
290 portid = of_getintprop_default(op->dev.of_node, "portid", -1);
291
292 /* Log the error. */
293 printk("SYSIO[%x]: Uncorrectable ECC Error, primary error type[%s]\n",
294 portid,
295 (((error_bits & SYSIO_UEAFSR_PPIO) ?
296 "PIO" :
297 ((error_bits & SYSIO_UEAFSR_PDRD) ?
298 "DVMA Read" :

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356 afar = upa_readq(afar_reg);
357
358 /* Clear primary/secondary error status bits. */
359 error_bits = afsr &
360 (SYSIO_CEAFSR_PPIO | SYSIO_CEAFSR_PDRD | SYSIO_CEAFSR_PDWR |
361 SYSIO_CEAFSR_SPIO | SYSIO_CEAFSR_SDRD | SYSIO_CEAFSR_SDWR);
362 upa_writeq(error_bits, afsr_reg);
363
291
292 /* Log the error. */
293 printk("SYSIO[%x]: Uncorrectable ECC Error, primary error type[%s]\n",
294 portid,
295 (((error_bits & SYSIO_UEAFSR_PPIO) ?
296 "PIO" :
297 ((error_bits & SYSIO_UEAFSR_PDRD) ?
298 "DVMA Read" :

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356 afar = upa_readq(afar_reg);
357
358 /* Clear primary/secondary error status bits. */
359 error_bits = afsr &
360 (SYSIO_CEAFSR_PPIO | SYSIO_CEAFSR_PDRD | SYSIO_CEAFSR_PDWR |
361 SYSIO_CEAFSR_SPIO | SYSIO_CEAFSR_SDRD | SYSIO_CEAFSR_SDWR);
362 upa_writeq(error_bits, afsr_reg);
363
364 portid = of_getintprop_default(op->node, "portid", -1);
364 portid = of_getintprop_default(op->dev.of_node, "portid", -1);
365
366 printk("SYSIO[%x]: Correctable ECC Error, primary error type[%s]\n",
367 portid,
368 (((error_bits & SYSIO_CEAFSR_PPIO) ?
369 "PIO" :
370 ((error_bits & SYSIO_CEAFSR_PDRD) ?
371 "DVMA Read" :
372 ((error_bits & SYSIO_CEAFSR_PDWR) ?

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434 afar = upa_readq(afar_reg);
435
436 /* Clear primary/secondary error status bits. */
437 error_bits = afsr &
438 (SYSIO_SBAFSR_PLE | SYSIO_SBAFSR_PTO | SYSIO_SBAFSR_PBERR |
439 SYSIO_SBAFSR_SLE | SYSIO_SBAFSR_STO | SYSIO_SBAFSR_SBERR);
440 upa_writeq(error_bits, afsr_reg);
441
365
366 printk("SYSIO[%x]: Correctable ECC Error, primary error type[%s]\n",
367 portid,
368 (((error_bits & SYSIO_CEAFSR_PPIO) ?
369 "PIO" :
370 ((error_bits & SYSIO_CEAFSR_PDRD) ?
371 "DVMA Read" :
372 ((error_bits & SYSIO_CEAFSR_PDWR) ?

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434 afar = upa_readq(afar_reg);
435
436 /* Clear primary/secondary error status bits. */
437 error_bits = afsr &
438 (SYSIO_SBAFSR_PLE | SYSIO_SBAFSR_PTO | SYSIO_SBAFSR_PBERR |
439 SYSIO_SBAFSR_SLE | SYSIO_SBAFSR_STO | SYSIO_SBAFSR_SBERR);
440 upa_writeq(error_bits, afsr_reg);
441
442 portid = of_getintprop_default(op->node, "portid", -1);
442 portid = of_getintprop_default(op->dev.of_node, "portid", -1);
443
444 /* Log the error. */
445 printk("SYSIO[%x]: SBUS Error, primary error type[%s] read(%d)\n",
446 portid,
447 (((error_bits & SYSIO_SBAFSR_PLE) ?
448 "Late PIO Error" :
449 ((error_bits & SYSIO_SBAFSR_PTO) ?
450 "Time Out" :

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491static void __init sysio_register_error_handlers(struct of_device *op)
492{
493 struct iommu *iommu = op->dev.archdata.iommu;
494 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL;
495 unsigned int irq;
496 u64 control;
497 int portid;
498
443
444 /* Log the error. */
445 printk("SYSIO[%x]: SBUS Error, primary error type[%s] read(%d)\n",
446 portid,
447 (((error_bits & SYSIO_SBAFSR_PLE) ?
448 "Late PIO Error" :
449 ((error_bits & SYSIO_SBAFSR_PTO) ?
450 "Time Out" :

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491static void __init sysio_register_error_handlers(struct of_device *op)
492{
493 struct iommu *iommu = op->dev.archdata.iommu;
494 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL;
495 unsigned int irq;
496 u64 control;
497 int portid;
498
499 portid = of_getintprop_default(op->node, "portid", -1);
499 portid = of_getintprop_default(op->dev.of_node, "portid", -1);
500
501 irq = sbus_build_irq(op, SYSIO_UE_INO);
502 if (request_irq(irq, sysio_ue_handler, 0,
503 "SYSIO_UE", op) < 0) {
504 prom_printf("SYSIO[%x]: Cannot register UE interrupt.\n",
505 portid);
506 prom_halt();
507 }

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532 control |= 0x100UL; /* SBUS Error Interrupt Enable */
533 upa_writeq(control, iommu->write_complete_reg);
534}
535
536/* Boot time initialization. */
537static void __init sbus_iommu_init(struct of_device *op)
538{
539 const struct linux_prom64_registers *pr;
500
501 irq = sbus_build_irq(op, SYSIO_UE_INO);
502 if (request_irq(irq, sysio_ue_handler, 0,
503 "SYSIO_UE", op) < 0) {
504 prom_printf("SYSIO[%x]: Cannot register UE interrupt.\n",
505 portid);
506 prom_halt();
507 }

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532 control |= 0x100UL; /* SBUS Error Interrupt Enable */
533 upa_writeq(control, iommu->write_complete_reg);
534}
535
536/* Boot time initialization. */
537static void __init sbus_iommu_init(struct of_device *op)
538{
539 const struct linux_prom64_registers *pr;
540 struct device_node *dp = op->node;
540 struct device_node *dp = op->dev.of_node;
541 struct iommu *iommu;
542 struct strbuf *strbuf;
543 unsigned long regs, reg_base;
544 int i, portid;
545 u64 control;
546
547 pr = of_get_property(dp, "reg", NULL);
548 if (!pr) {

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584 strbuf->strbuf_flushflag_pa = (unsigned long)
585 __pa(strbuf->strbuf_flushflag);
586
587 /* The SYSIO SBUS control register is used for dummy reads
588 * in order to ensure write completion.
589 */
590 iommu->write_complete_reg = regs + 0x2000UL;
591
541 struct iommu *iommu;
542 struct strbuf *strbuf;
543 unsigned long regs, reg_base;
544 int i, portid;
545 u64 control;
546
547 pr = of_get_property(dp, "reg", NULL);
548 if (!pr) {

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584 strbuf->strbuf_flushflag_pa = (unsigned long)
585 __pa(strbuf->strbuf_flushflag);
586
587 /* The SYSIO SBUS control register is used for dummy reads
588 * in order to ensure write completion.
589 */
590 iommu->write_complete_reg = regs + 0x2000UL;
591
592 portid = of_getintprop_default(op->node, "portid", -1);
592 portid = of_getintprop_default(op->dev.of_node, "portid", -1);
593 printk(KERN_INFO "SYSIO: UPA portID %x, at %016lx\n",
594 portid, regs);
595
596 /* Setup for TSB_SIZE=7, TBW_SIZE=0, MMU_DE=1, MMU_EN=1 */
597 if (iommu_table_init(iommu, IO_TSB_SIZE, MAP_BASE, 0xffffffff, -1))
598 goto fatal_memory_error;
599
600 control = upa_readq(iommu->iommu_control);

--- 75 unchanged lines hidden --- 		593 printk(KERN_INFO "SYSIO: UPA portID %x, at %016lx\n",
594 portid, regs);
595
596 /* Setup for TSB_SIZE=7, TBW_SIZE=0, MMU_DE=1, MMU_EN=1 */
597 if (iommu_table_init(iommu, IO_TSB_SIZE, MAP_BASE, 0xffffffff, -1))
598 goto fatal_memory_error;
599
600 control = upa_readq(iommu->iommu_control);

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