| head_32.S (e5451c8f8330e03ad3cfa16048b4daf961af434f) | head_32.S (7480e0aabd5f9e6c3e3b72ed206e89284e90f11f) |
|---|---|
| 1/* $Id: head.S,v 1.7 2003/09/01 17:58:19 lethal Exp $ 2 * 3 * arch/sh/kernel/head.S 4 * 5 * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima 6 * Copyright (C) 2010 Matt Fleming 7 * 8 * This file is subject to the terms and conditions of the GNU General Public --- 52 unchanged lines hidden (view full) --- 61 ! Initialize Status Register 62 mov.l 1f, r0 ! MD=1, RB=0, BL=0, IMASK=0xF 63 ldc r0, sr 64 ! Initialize global interrupt mask 65#ifdef CONFIG_CPU_HAS_SR_RB 66 mov #0, r0 67 ldc r0, r6_bank 68#endif | 1/* $Id: head.S,v 1.7 2003/09/01 17:58:19 lethal Exp $ 2 * 3 * arch/sh/kernel/head.S 4 * 5 * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima 6 * Copyright (C) 2010 Matt Fleming 7 * 8 * This file is subject to the terms and conditions of the GNU General Public --- 52 unchanged lines hidden (view full) --- 61 ! Initialize Status Register 62 mov.l 1f, r0 ! MD=1, RB=0, BL=0, IMASK=0xF 63 ldc r0, sr 64 ! Initialize global interrupt mask 65#ifdef CONFIG_CPU_HAS_SR_RB 66 mov #0, r0 67 ldc r0, r6_bank 68#endif |
| 69 70#ifdef CONFIG_OF 71 mov r4, r12 ! Store device tree blob pointer in r12 72#endif |
|
| 69 70 /* 71 * Prefetch if possible to reduce cache miss penalty. 72 * 73 * We do this early on for SH-4A as a micro-optimization, 74 * as later on we will have speculative execution enabled 75 * and this will become less of an issue. 76 */ --- 232 unchanged lines hidden (view full) --- 309 mov #0, r0 3109: cmp/hs r2, r1 311 bf/s 9b ! while (r1 < r2) 312 mov.l r0,@-r2 313 31410: 315#endif 316 | 73 74 /* 75 * Prefetch if possible to reduce cache miss penalty. 76 * 77 * We do this early on for SH-4A as a micro-optimization, 78 * as later on we will have speculative execution enabled 79 * and this will become less of an issue. 80 */ --- 232 unchanged lines hidden (view full) --- 313 mov #0, r0 3149: cmp/hs r2, r1 315 bf/s 9b ! while (r1 < r2) 316 mov.l r0,@-r2 317 31810: 319#endif 320 |
| 321#ifdef CONFIG_OF 322 mov.l 8f, r0 ! Make flat device tree available early. 323 jsr @r0 324 mov r12, r4 325#endif 326 |
|
| 317 ! Additional CPU initialization 318 mov.l 6f, r0 319 jsr @r0 320 nop 321 322 SYNCO() ! Wait for pending instructions.. 323 324 ! Start kernel --- 9 unchanged lines hidden (view full) --- 334#endif 335ENTRY(stack_start) 3362: .long init_thread_union+THREAD_SIZE 3373: .long __bss_start 3384: .long _end 3395: .long start_kernel 3406: .long cpu_init 3417: .long init_thread_union | 327 ! Additional CPU initialization 328 mov.l 6f, r0 329 jsr @r0 330 nop 331 332 SYNCO() ! Wait for pending instructions.. 333 334 ! Start kernel --- 9 unchanged lines hidden (view full) --- 344#endif 345ENTRY(stack_start) 3462: .long init_thread_union+THREAD_SIZE 3473: .long __bss_start 3484: .long _end 3495: .long start_kernel 3506: .long cpu_init 3517: .long init_thread_union |
| 352#if defined(CONFIG_OF) 3538: .long sh_fdt_init 354#endif |
|
| 342 343#ifdef CONFIG_PMB 344.LPMB_ADDR: .long PMB_ADDR 345.LPMB_DATA: .long PMB_DATA 346.LPMB_DATA_MASK: .long PMB_PFN_MASK | PMB_V 347.LFIRST_ADDR_ENTRY: .long PAGE_OFFSET | PMB_V 348.LFIRST_DATA_ENTRY: .long __MEMORY_START | PMB_V 349.LMMUCR: .long MMUCR 350.LMEMORY_SIZE: .long __MEMORY_SIZE 351#ifdef CONFIG_UNCACHED_MAPPING 352.Lcached_to_uncached: .long cached_to_uncached 353.Luncached_size: .long uncached_size 354#endif 355#endif | 355 356#ifdef CONFIG_PMB 357.LPMB_ADDR: .long PMB_ADDR 358.LPMB_DATA: .long PMB_DATA 359.LPMB_DATA_MASK: .long PMB_PFN_MASK | PMB_V 360.LFIRST_ADDR_ENTRY: .long PAGE_OFFSET | PMB_V 361.LFIRST_DATA_ENTRY: .long __MEMORY_START | PMB_V 362.LMMUCR: .long MMUCR 363.LMEMORY_SIZE: .long __MEMORY_SIZE 364#ifdef CONFIG_UNCACHED_MAPPING 365.Lcached_to_uncached: .long cached_to_uncached 366.Luncached_size: .long uncached_size 367#endif 368#endif |