fpu.c (2d8ad8719591fa803b0d589ed057fa46f49b7155) fpu.c (e839ca528718e68cad32a307dc9aabf01ef3eb05)
1/*
2 * Save/restore floating point context for signal handlers.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka
9 * Copyright (C) 2006 ST Microelectronics Ltd. (denorm support)
10 *
11 * FIXME! These routines have not been tested for big endian case.
12 */
13#include <linux/sched.h>
14#include <linux/signal.h>
15#include <linux/io.h>
16#include <cpu/fpu.h>
17#include <asm/processor.h>
1/*
2 * Save/restore floating point context for signal handlers.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka
9 * Copyright (C) 2006 ST Microelectronics Ltd. (denorm support)
10 *
11 * FIXME! These routines have not been tested for big endian case.
12 */
13#include <linux/sched.h>
14#include <linux/signal.h>
15#include <linux/io.h>
16#include <cpu/fpu.h>
17#include <asm/processor.h>
18#include <asm/system.h>
19#include <asm/fpu.h>
20
21/* The PR (precision) bit in the FP Status Register must be clear when
22 * an frchg instruction is executed, otherwise the instruction is undefined.
23 * Executing frchg with PR set causes a trap on some SH4 implementations.
24 */
25
26#define FPSCR_RCHG 0x00000000

--- 403 unchanged lines hidden --- 		18#include <asm/fpu.h>
19
20/* The PR (precision) bit in the FP Status Register must be clear when
21 * an frchg instruction is executed, otherwise the instruction is undefined.
22 * Executing frchg with PR set causes a trap on some SH4 implementations.
23 */
24
25#define FPSCR_RCHG 0x00000000

--- 403 unchanged lines hidden ---