addrspace.h (5a2dd72abdae75ea2960145e0549635ce4e0be96) | addrspace.h (2f47f44790a9c8fc43e515df3c6be19a35ee5de5) |
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1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1999 by Kaz Kojima 7 * 8 * Defitions for the address spaces of the SH CPUs. --- 17 unchanged lines hidden (view full) --- 26 */ 27 28/* Returns the privileged segment base of a given address */ 29#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) 30 31/* Returns the physical address of a PnSEG (n=1,2) address */ 32#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff) 33 | 1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1999 by Kaz Kojima 7 * 8 * Defitions for the address spaces of the SH CPUs. --- 17 unchanged lines hidden (view full) --- 26 */ 27 28/* Returns the privileged segment base of a given address */ 29#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) 30 31/* Returns the physical address of a PnSEG (n=1,2) address */ 32#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff) 33 |
34#ifdef CONFIG_29BIT | 34#if defined(CONFIG_29BIT) || defined(CONFIG_PMB_FIXED) |
35/* 36 * Map an address to a certain privileged segment 37 */ 38#define P1SEGADDR(a) \ 39 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG)) 40#define P2SEGADDR(a) \ 41 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG)) 42#define P3SEGADDR(a) \ 43 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG)) 44#define P4SEGADDR(a) \ 45 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG)) | 35/* 36 * Map an address to a certain privileged segment 37 */ 38#define P1SEGADDR(a) \ 39 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG)) 40#define P2SEGADDR(a) \ 41 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG)) 42#define P3SEGADDR(a) \ 43 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG)) 44#define P4SEGADDR(a) \ 45 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG)) |
46#endif /* 29BIT */ | 46#endif /* 29BIT || PMB_FIXED */ |
47#endif /* P1SEG */ 48 49/* Check if an address can be reached in 29 bits */ 50#define IS_29BIT(a) (((unsigned long)(a)) < 0x20000000) 51 52#ifdef CONFIG_SH_STORE_QUEUES 53/* 54 * This is a special case for the SH-4 store queues, as pages for this 55 * space still need to be faulted in before it's possible to flush the 56 * store queue cache for writeout to the remapped region. 57 */ 58#define P3_ADDR_MAX (P4SEG_STORE_QUE + 0x04000000) 59#else 60#define P3_ADDR_MAX P4SEG 61#endif 62 63#endif /* __KERNEL__ */ 64#endif /* __ASM_SH_ADDRSPACE_H */ | 47#endif /* P1SEG */ 48 49/* Check if an address can be reached in 29 bits */ 50#define IS_29BIT(a) (((unsigned long)(a)) < 0x20000000) 51 52#ifdef CONFIG_SH_STORE_QUEUES 53/* 54 * This is a special case for the SH-4 store queues, as pages for this 55 * space still need to be faulted in before it's possible to flush the 56 * store queue cache for writeout to the remapped region. 57 */ 58#define P3_ADDR_MAX (P4SEG_STORE_QUE + 0x04000000) 59#else 60#define P3_ADDR_MAX P4SEG 61#endif 62 63#endif /* __KERNEL__ */ 64#endif /* __ASM_SH_ADDRSPACE_H */ |