smp.c (e205ceeb253723f4e4bdce619844ed678ae48276) smp.c (fcdc65375186a5cd69cc2eedfb498b86f4f5a21e)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * SMP initialisation and IPI support
4 * Based on arch/arm64/kernel/smp.c
5 *
6 * Copyright (C) 2012 ARM Ltd.
7 * Copyright (C) 2015 Regents of the University of California
8 * Copyright (C) 2017 SiFive
9 */
10
11#include <linux/cpu.h>
12#include <linux/interrupt.h>
13#include <linux/profile.h>
14#include <linux/smp.h>
15#include <linux/sched.h>
16#include <linux/seq_file.h>
17#include <linux/delay.h>
18
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * SMP initialisation and IPI support
4 * Based on arch/arm64/kernel/smp.c
5 *
6 * Copyright (C) 2012 ARM Ltd.
7 * Copyright (C) 2015 Regents of the University of California
8 * Copyright (C) 2017 SiFive
9 */
10
11#include <linux/cpu.h>
12#include <linux/interrupt.h>
13#include <linux/profile.h>
14#include <linux/smp.h>
15#include <linux/sched.h>
16#include <linux/seq_file.h>
17#include <linux/delay.h>
18
19#include <asm/clint.h>
19#include <asm/sbi.h>
20#include <asm/tlbflush.h>
21#include <asm/cacheflush.h>
22
23enum ipi_message_type {
24 IPI_RESCHEDULE,
25 IPI_CALL_FUNC,
26 IPI_CPU_STOP,

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87 int cpu;
88
89 smp_mb__before_atomic();
90 for_each_cpu(cpu, mask)
91 set_bit(op, &ipi_data[cpu].bits);
92 smp_mb__after_atomic();
93
94 riscv_cpuid_to_hartid_mask(mask, &hartid_mask);
20#include <asm/sbi.h>
21#include <asm/tlbflush.h>
22#include <asm/cacheflush.h>
23
24enum ipi_message_type {
25 IPI_RESCHEDULE,
26 IPI_CALL_FUNC,
27 IPI_CPU_STOP,

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88 int cpu;
89
90 smp_mb__before_atomic();
91 for_each_cpu(cpu, mask)
92 set_bit(op, &ipi_data[cpu].bits);
93 smp_mb__after_atomic();
94
95 riscv_cpuid_to_hartid_mask(mask, &hartid_mask);
95 sbi_send_ipi(cpumask_bits(&hartid_mask));
96 if (IS_ENABLED(CONFIG_RISCV_SBI))
97 sbi_send_ipi(cpumask_bits(&hartid_mask));
98 else
99 clint_send_ipi_mask(&hartid_mask);
96}
97
98static void send_ipi_single(int cpu, enum ipi_message_type op)
99{
100 int hartid = cpuid_to_hartid_map(cpu);
101
102 smp_mb__before_atomic();
103 set_bit(op, &ipi_data[cpu].bits);
104 smp_mb__after_atomic();
105
100}
101
102static void send_ipi_single(int cpu, enum ipi_message_type op)
103{
104 int hartid = cpuid_to_hartid_map(cpu);
105
106 smp_mb__before_atomic();
107 set_bit(op, &ipi_data[cpu].bits);
108 smp_mb__after_atomic();
109
106 sbi_send_ipi(cpumask_bits(cpumask_of(hartid)));
110 if (IS_ENABLED(CONFIG_RISCV_SBI))
111 sbi_send_ipi(cpumask_bits(cpumask_of(hartid)));
112 else
113 clint_send_ipi_single(hartid);
107}
108
109static inline void clear_ipi(void)
110{
114}
115
116static inline void clear_ipi(void)
117{
111 csr_clear(CSR_SIP, SIE_SSIE);
118 if (IS_ENABLED(CONFIG_RISCV_SBI))
119 csr_clear(CSR_IP, IE_SIE);
120 else
121 clint_clear_ipi(cpuid_to_hartid_map(smp_processor_id()));
112}
113
114void riscv_software_interrupt(void)
115{
116 unsigned long *pending_ipis = &ipi_data[smp_processor_id()].bits;
117 unsigned long *stats = ipi_data[smp_processor_id()].stats;
118
119 clear_ipi();

--- 92 unchanged lines hidden --- 		122}
123
124void riscv_software_interrupt(void)
125{
126 unsigned long *pending_ipis = &ipi_data[smp_processor_id()].bits;
127 unsigned long *stats = ipi_data[smp_processor_id()].stats;
128
129 clear_ipi();

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