| head.S (c9f289701540baeef9ac7c9977d67a7259f404db) | head.S (335b139057ef79dbede01dea6e8c3f47c2b88802) |
|---|---|
| 1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (C) 2012 Regents of the University of California 4 */ 5 6#include <asm/thread_info.h> 7#include <asm/asm-offsets.h> 8#include <asm/asm.h> 9#include <linux/init.h> 10#include <linux/linkage.h> 11#include <asm/thread_info.h> 12#include <asm/page.h> 13#include <asm/csr.h> 14#include <asm/hwcap.h> 15#include <asm/image.h> 16 | 1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (C) 2012 Regents of the University of California 4 */ 5 6#include <asm/thread_info.h> 7#include <asm/asm-offsets.h> 8#include <asm/asm.h> 9#include <linux/init.h> 10#include <linux/linkage.h> 11#include <asm/thread_info.h> 12#include <asm/page.h> 13#include <asm/csr.h> 14#include <asm/hwcap.h> 15#include <asm/image.h> 16 |
| 17__INIT | 17__HEAD |
| 18ENTRY(_start) 19 /* 20 * Image header expected by Linux boot-loaders. The image header data 21 * structure is described in asm/image.h. 22 * Do not modify it without modifying the structure and all bootloaders 23 * that expects this header format!! 24 */ 25 /* jump to start kernel */ --- 14 unchanged lines hidden (view full) --- 40 .word RISCV_HEADER_VERSION 41 .word 0 42 .dword 0 43 .ascii RISCV_IMAGE_MAGIC 44 .balign 4 45 .ascii RISCV_IMAGE_MAGIC2 46 .word 0 47 | 18ENTRY(_start) 19 /* 20 * Image header expected by Linux boot-loaders. The image header data 21 * structure is described in asm/image.h. 22 * Do not modify it without modifying the structure and all bootloaders 23 * that expects this header format!! 24 */ 25 /* jump to start kernel */ --- 14 unchanged lines hidden (view full) --- 40 .word RISCV_HEADER_VERSION 41 .word 0 42 .dword 0 43 .ascii RISCV_IMAGE_MAGIC 44 .balign 4 45 .ascii RISCV_IMAGE_MAGIC2 46 .word 0 47 |
| 48.global _start_kernel 49_start_kernel: | 48.align 2 49#ifdef CONFIG_MMU 50relocate: 51 /* Relocate return address */ 52 li a1, PAGE_OFFSET 53 la a2, _start 54 sub a1, a1, a2 55 add ra, ra, a1 56 57 /* Point stvec to virtual address of intruction after satp write */ 58 la a2, 1f 59 add a2, a2, a1 60 csrw CSR_TVEC, a2 61 62 /* Compute satp for kernel page tables, but don't load it yet */ 63 srl a2, a0, PAGE_SHIFT 64 li a1, SATP_MODE 65 or a2, a2, a1 66 67 /* 68 * Load trampoline page directory, which will cause us to trap to 69 * stvec if VA != PA, or simply fall through if VA == PA. We need a 70 * full fence here because setup_vm() just wrote these PTEs and we need 71 * to ensure the new translations are in use. 72 */ 73 la a0, trampoline_pg_dir 74 srl a0, a0, PAGE_SHIFT 75 or a0, a0, a1 76 sfence.vma 77 csrw CSR_SATP, a0 78.align 2 791: 80 /* Set trap vector to spin forever to help debug */ 81 la a0, .Lsecondary_park 82 csrw CSR_TVEC, a0 83 84 /* Reload the global pointer */ 85.option push 86.option norelax 87 la gp, __global_pointer$ 88.option pop 89 90 /* 91 * Switch to kernel page tables. A full fence is necessary in order to 92 * avoid using the trampoline translations, which are only correct for 93 * the first superpage. Fetching the fence is guarnteed to work 94 * because that first superpage is translated the same way. 95 */ 96 csrw CSR_SATP, a2 97 sfence.vma 98 99 ret 100#endif /* CONFIG_MMU */ 101#ifdef CONFIG_SMP 102 .global secondary_start_sbi 103secondary_start_sbi: |
| 50 /* Mask all interrupts */ 51 csrw CSR_IE, zero 52 csrw CSR_IP, zero 53 | 104 /* Mask all interrupts */ 105 csrw CSR_IE, zero 106 csrw CSR_IP, zero 107 |
| 108 /* Load the global pointer */ 109 .option push 110 .option norelax 111 la gp, __global_pointer$ 112 .option pop 113 114 /* 115 * Disable FPU to detect illegal usage of 116 * floating point in kernel space 117 */ 118 li t0, SR_FS 119 csrc CSR_STATUS, t0 120 121 /* Set trap vector to spin forever to help debug */ 122 la a3, .Lsecondary_park 123 csrw CSR_TVEC, a3 124 125 slli a3, a0, LGREG 126 la a4, __cpu_up_stack_pointer 127 la a5, __cpu_up_task_pointer 128 add a4, a3, a4 129 add a5, a3, a5 130 REG_L sp, (a4) 131 REG_L tp, (a5) 132 133 .global secondary_start_common 134secondary_start_common: 135 136#ifdef CONFIG_MMU 137 /* Enable virtual memory and relocate to virtual address */ 138 la a0, swapper_pg_dir 139 call relocate 140#endif 141 tail smp_callin 142#endif /* CONFIG_SMP */ 143 144.Lsecondary_park: 145 /* We lack SMP support or have too many harts, so park this hart */ 146 wfi 147 j .Lsecondary_park 148 149END(_start) 150 151 __INIT 152ENTRY(_start_kernel) 153 /* Mask all interrupts */ 154 csrw CSR_IE, zero 155 csrw CSR_IP, zero 156 |
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| 54#ifdef CONFIG_RISCV_M_MODE 55 /* flush the instruction cache */ 56 fence.i 57 58 /* Reset all registers except ra, a0, a1 */ 59 call reset_regs 60 61 /* Setup a PMP to permit access to all of memory. */ --- 64 unchanged lines hidden (view full) --- 126 la tp, init_task 127 sw zero, TASK_TI_CPU(tp) 128 la sp, init_thread_union + THREAD_SIZE 129 130#ifdef CONFIG_KASAN 131 call kasan_early_init 132#endif 133 /* Start the kernel */ | 157#ifdef CONFIG_RISCV_M_MODE 158 /* flush the instruction cache */ 159 fence.i 160 161 /* Reset all registers except ra, a0, a1 */ 162 call reset_regs 163 164 /* Setup a PMP to permit access to all of memory. */ --- 64 unchanged lines hidden (view full) --- 229 la tp, init_task 230 sw zero, TASK_TI_CPU(tp) 231 la sp, init_thread_union + THREAD_SIZE 232 233#ifdef CONFIG_KASAN 234 call kasan_early_init 235#endif 236 /* Start the kernel */ |
| 237 call soc_early_init |
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| 134 call parse_dtb 135 tail start_kernel 136 | 238 call parse_dtb 239 tail start_kernel 240 |
| 137#ifdef CONFIG_MMU 138relocate: 139 /* Relocate return address */ 140 li a1, PAGE_OFFSET 141 la a2, _start 142 sub a1, a1, a2 143 add ra, ra, a1 144 145 /* Point stvec to virtual address of intruction after satp write */ 146 la a2, 1f 147 add a2, a2, a1 148 csrw CSR_TVEC, a2 149 150 /* Compute satp for kernel page tables, but don't load it yet */ 151 srl a2, a0, PAGE_SHIFT 152 li a1, SATP_MODE 153 or a2, a2, a1 154 155 /* 156 * Load trampoline page directory, which will cause us to trap to 157 * stvec if VA != PA, or simply fall through if VA == PA. We need a 158 * full fence here because setup_vm() just wrote these PTEs and we need 159 * to ensure the new translations are in use. 160 */ 161 la a0, trampoline_pg_dir 162 srl a0, a0, PAGE_SHIFT 163 or a0, a0, a1 164 sfence.vma 165 csrw CSR_SATP, a0 166.align 2 1671: 168 /* Set trap vector to spin forever to help debug */ 169 la a0, .Lsecondary_park 170 csrw CSR_TVEC, a0 171 172 /* Reload the global pointer */ 173.option push 174.option norelax 175 la gp, __global_pointer$ 176.option pop 177 178 /* 179 * Switch to kernel page tables. A full fence is necessary in order to 180 * avoid using the trampoline translations, which are only correct for 181 * the first superpage. Fetching the fence is guarnteed to work 182 * because that first superpage is translated the same way. 183 */ 184 csrw CSR_SATP, a2 185 sfence.vma 186 187 ret 188#endif /* CONFIG_MMU */ 189 | |
| 190.Lsecondary_start: 191#ifdef CONFIG_SMP 192 /* Set trap vector to spin forever to help debug */ 193 la a3, .Lsecondary_park 194 csrw CSR_TVEC, a3 195 196 slli a3, a0, LGREG 197 la a1, __cpu_up_stack_pointer --- 8 unchanged lines hidden (view full) --- 206.Lwait_for_cpu_up: 207 /* FIXME: We should WFI to save some energy here. */ 208 REG_L sp, (a1) 209 REG_L tp, (a2) 210 beqz sp, .Lwait_for_cpu_up 211 beqz tp, .Lwait_for_cpu_up 212 fence 213 | 241.Lsecondary_start: 242#ifdef CONFIG_SMP 243 /* Set trap vector to spin forever to help debug */ 244 la a3, .Lsecondary_park 245 csrw CSR_TVEC, a3 246 247 slli a3, a0, LGREG 248 la a1, __cpu_up_stack_pointer --- 8 unchanged lines hidden (view full) --- 257.Lwait_for_cpu_up: 258 /* FIXME: We should WFI to save some energy here. */ 259 REG_L sp, (a1) 260 REG_L tp, (a2) 261 beqz sp, .Lwait_for_cpu_up 262 beqz tp, .Lwait_for_cpu_up 263 fence 264 |
| 214#ifdef CONFIG_MMU 215 /* Enable virtual memory and relocate to virtual address */ 216 la a0, swapper_pg_dir 217 call relocate | 265 tail secondary_start_common |
| 218#endif 219 | 266#endif 267 |
| 220 tail smp_callin 221#endif | 268END(_start_kernel) |
| 222 | 269 |
| 223END(_start) 224 | |
| 225#ifdef CONFIG_RISCV_M_MODE 226ENTRY(reset_regs) 227 li sp, 0 228 li gp, 0 229 li tp, 0 230 li t0, 0 231 li t1, 0 232 li t2, 0 --- 63 unchanged lines hidden (view full) --- 296 csrw fcsr, 0 297 /* note that the caller must clear SR_FS */ 298#endif /* CONFIG_FPU */ 299.Lreset_regs_done: 300 ret 301END(reset_regs) 302#endif /* CONFIG_RISCV_M_MODE */ 303 | 270#ifdef CONFIG_RISCV_M_MODE 271ENTRY(reset_regs) 272 li sp, 0 273 li gp, 0 274 li tp, 0 275 li t0, 0 276 li t1, 0 277 li t2, 0 --- 63 unchanged lines hidden (view full) --- 341 csrw fcsr, 0 342 /* note that the caller must clear SR_FS */ 343#endif /* CONFIG_FPU */ 344.Lreset_regs_done: 345 ret 346END(reset_regs) 347#endif /* CONFIG_RISCV_M_MODE */ 348 |
| 304.section ".text", "ax",@progbits 305.align 2 306.Lsecondary_park: 307 /* We lack SMP support or have too many harts, so park this hart */ 308 wfi 309 j .Lsecondary_park 310 | |
| 311__PAGE_ALIGNED_BSS 312 /* Empty zero page */ 313 .balign PAGE_SIZE | 349__PAGE_ALIGNED_BSS 350 /* Empty zero page */ 351 .balign PAGE_SIZE |