image.h (8dd06ef34b6e2f41b29fbf5fc1663780f2524285) | image.h (809a11eea8e8c80491e3ba3a286af25409c072d5) |
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1/* SPDX-License-Identifier: GPL-2.0 */ 2 3#ifndef _ASM_RISCV_IMAGE_H 4#define _ASM_RISCV_IMAGE_H 5 6#define RISCV_IMAGE_MAGIC "RISCV\0\0\0" 7#define RISCV_IMAGE_MAGIC2 "RSC\x05" 8 --- 16 unchanged lines hidden (view full) --- 25 26#define RISCV_HEADER_VERSION_MAJOR 0 27#define RISCV_HEADER_VERSION_MINOR 2 28 29#define RISCV_HEADER_VERSION (RISCV_HEADER_VERSION_MAJOR << 16 | \ 30 RISCV_HEADER_VERSION_MINOR) 31 32#ifndef __ASSEMBLY__ | 1/* SPDX-License-Identifier: GPL-2.0 */ 2 3#ifndef _ASM_RISCV_IMAGE_H 4#define _ASM_RISCV_IMAGE_H 5 6#define RISCV_IMAGE_MAGIC "RISCV\0\0\0" 7#define RISCV_IMAGE_MAGIC2 "RSC\x05" 8 --- 16 unchanged lines hidden (view full) --- 25 26#define RISCV_HEADER_VERSION_MAJOR 0 27#define RISCV_HEADER_VERSION_MINOR 2 28 29#define RISCV_HEADER_VERSION (RISCV_HEADER_VERSION_MAJOR << 16 | \ 30 RISCV_HEADER_VERSION_MINOR) 31 32#ifndef __ASSEMBLY__ |
33#define riscv_image_flag_field(flags, field)\ 34 (((flags) >> field##_SHIFT) & field##_MASK) |
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33/** 34 * struct riscv_image_header - riscv kernel image header 35 * @code0: Executable code 36 * @code1: Executable code 37 * @text_offset: Image load offset (little endian) 38 * @image_size: Effective Image size (little endian) 39 * @flags: kernel flags (little endian) 40 * @version: version --- 25 unchanged lines hidden --- | 35/** 36 * struct riscv_image_header - riscv kernel image header 37 * @code0: Executable code 38 * @code1: Executable code 39 * @text_offset: Image load offset (little endian) 40 * @image_size: Effective Image size (little endian) 41 * @flags: kernel flags (little endian) 42 * @version: version --- 25 unchanged lines hidden --- |