cpufeature.h (c05a62c92516d7679c819f8a5177cf84c8668954) | cpufeature.h (d1703dc7bc8ec7adb91f5ceaf1556ff1ed212858) |
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1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright 2022-2024 Rivos, Inc 4 */ 5 6#ifndef _ASM_CPUFEATURE_H 7#define _ASM_CPUFEATURE_H 8 --- 45 unchanged lines hidden (view full) --- 54 ARRAY_SIZE(_bundled_exts), NULL) 55 56/* Used to declare extensions that are a superset of other extensions (Zvbb for instance) */ 57#define __RISCV_ISA_EXT_SUPERSET(_name, _id, _sub_exts) \ 58 _RISCV_ISA_EXT_DATA(_name, _id, _sub_exts, ARRAY_SIZE(_sub_exts), NULL) 59#define __RISCV_ISA_EXT_SUPERSET_VALIDATE(_name, _id, _sub_exts, _validate) \ 60 _RISCV_ISA_EXT_DATA(_name, _id, _sub_exts, ARRAY_SIZE(_sub_exts), _validate) 61 | 1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright 2022-2024 Rivos, Inc 4 */ 5 6#ifndef _ASM_CPUFEATURE_H 7#define _ASM_CPUFEATURE_H 8 --- 45 unchanged lines hidden (view full) --- 54 ARRAY_SIZE(_bundled_exts), NULL) 55 56/* Used to declare extensions that are a superset of other extensions (Zvbb for instance) */ 57#define __RISCV_ISA_EXT_SUPERSET(_name, _id, _sub_exts) \ 58 _RISCV_ISA_EXT_DATA(_name, _id, _sub_exts, ARRAY_SIZE(_sub_exts), NULL) 59#define __RISCV_ISA_EXT_SUPERSET_VALIDATE(_name, _id, _sub_exts, _validate) \ 60 _RISCV_ISA_EXT_DATA(_name, _id, _sub_exts, ARRAY_SIZE(_sub_exts), _validate) 61 |
62#if defined(CONFIG_RISCV_SCALAR_MISALIGNED) | |
63bool check_unaligned_access_emulated_all_cpus(void); | 62bool check_unaligned_access_emulated_all_cpus(void); |
63#if defined(CONFIG_RISCV_SCALAR_MISALIGNED) |
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64void check_unaligned_access_emulated(struct work_struct *work __always_unused); 65void unaligned_emulation_finish(void); 66bool unaligned_ctl_available(void); 67DECLARE_PER_CPU(long, misaligned_access_speed); 68#else 69static inline bool unaligned_ctl_available(void) 70{ 71 return false; 72} 73#endif 74 | 64void check_unaligned_access_emulated(struct work_struct *work __always_unused); 65void unaligned_emulation_finish(void); 66bool unaligned_ctl_available(void); 67DECLARE_PER_CPU(long, misaligned_access_speed); 68#else 69static inline bool unaligned_ctl_available(void) 70{ 71 return false; 72} 73#endif 74 |
75bool check_vector_unaligned_access_emulated_all_cpus(void); 76#if defined(CONFIG_RISCV_VECTOR_MISALIGNED) 77void check_vector_unaligned_access_emulated(struct work_struct *work __always_unused); 78DECLARE_PER_CPU(long, vector_misaligned_access); 79#endif 80 |
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75#if defined(CONFIG_RISCV_PROBE_UNALIGNED_ACCESS) 76DECLARE_STATIC_KEY_FALSE(fast_unaligned_access_speed_key); 77 78static __always_inline bool has_fast_unaligned_accesses(void) 79{ 80 return static_branch_likely(&fast_unaligned_access_speed_key); 81} 82#else --- 103 unchanged lines hidden --- | 81#if defined(CONFIG_RISCV_PROBE_UNALIGNED_ACCESS) 82DECLARE_STATIC_KEY_FALSE(fast_unaligned_access_speed_key); 83 84static __always_inline bool has_fast_unaligned_accesses(void) 85{ 86 return static_branch_likely(&fast_unaligned_access_speed_key); 87} 88#else --- 103 unchanged lines hidden --- |