cacheflush.h (a1c613ae4c322ddd58d5a8539dbfba2a0380a8c0) cacheflush.h (7a92fc8b4d20680e4c20289a670d8fca2d1f2c1b)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2015 Regents of the University of California
4 */
5
6#ifndef _ASM_RISCV_CACHEFLUSH_H
7#define _ASM_RISCV_CACHEFLUSH_H
8

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32 * RISC-V doesn't have an instruction to flush parts of the instruction cache,
33 * so instead we just flush the whole thing.
34 */
35#define flush_icache_range(start, end) flush_icache_all()
36#define flush_icache_user_page(vma, pg, addr, len) \
37 flush_icache_mm(vma->vm_mm, 0)
38
39#ifdef CONFIG_64BIT
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2015 Regents of the University of California
4 */
5
6#ifndef _ASM_RISCV_CACHEFLUSH_H
7#define _ASM_RISCV_CACHEFLUSH_H
8

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32 * RISC-V doesn't have an instruction to flush parts of the instruction cache,
33 * so instead we just flush the whole thing.
34 */
35#define flush_icache_range(start, end) flush_icache_all()
36#define flush_icache_user_page(vma, pg, addr, len) \
37 flush_icache_mm(vma->vm_mm, 0)
38
39#ifdef CONFIG_64BIT
40#define flush_cache_vmap(start, end) flush_tlb_kernel_range(start, end)
40#define flush_cache_vmap(start, end) flush_tlb_kernel_range(start, end)
41#define flush_cache_vmap_early(start, end) local_flush_tlb_kernel_range(start, end)
41#endif
42
43#ifndef CONFIG_SMP
44
45#define flush_icache_all() local_flush_icache_all()
46#define flush_icache_mm(mm, local) flush_icache_all()
47
48#else /* CONFIG_SMP */

--- 27 unchanged lines hidden --- 		42#endif
43
44#ifndef CONFIG_SMP
45
46#define flush_icache_all() local_flush_icache_all()
47#define flush_icache_mm(mm, local) flush_icache_all()
48
49#else /* CONFIG_SMP */

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