asm.h (8be98d2f2a0a262f8bf8a0bc1fdf522b3c7aab17) asm.h (63b13e64a829e7b12fba81fccbea0d5448fc0c24)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2015 Regents of the University of California
4 */
5
6#ifndef _ASM_RISCV_ASM_H
7#define _ASM_RISCV_ASM_H
8

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62#if (__SIZEOF_SHORT__ == 2)
63#define RISCV_SHORT __ASM_STR(.half)
64#define RISCV_SZSHORT __ASM_STR(2)
65#define RISCV_LGSHORT __ASM_STR(1)
66#else
67#error "Unexpected __SIZEOF_SHORT__"
68#endif
69
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2015 Regents of the University of California
4 */
5
6#ifndef _ASM_RISCV_ASM_H
7#define _ASM_RISCV_ASM_H
8

--- 53 unchanged lines hidden (view full) ---

62#if (__SIZEOF_SHORT__ == 2)
63#define RISCV_SHORT __ASM_STR(.half)
64#define RISCV_SZSHORT __ASM_STR(2)
65#define RISCV_LGSHORT __ASM_STR(1)
66#else
67#error "Unexpected __SIZEOF_SHORT__"
68#endif
69
70#ifdef __ASSEMBLY__
71
72/* Common assembly source macros */
73
74#ifdef CONFIG_XIP_KERNEL
75.macro XIP_FIXUP_OFFSET reg
76 REG_L t0, _xip_fixup
77 add \reg, \reg, t0
78.endm
79.macro XIP_FIXUP_FLASH_OFFSET reg
80 la t1, __data_loc
81 li t0, XIP_OFFSET_MASK
82 and t1, t1, t0
83 li t1, XIP_OFFSET
84 sub t0, t0, t1
85 sub \reg, \reg, t0
86.endm
87_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET
88#else
89.macro XIP_FIXUP_OFFSET reg
90.endm
91.macro XIP_FIXUP_FLASH_OFFSET reg
92.endm
93#endif /* CONFIG_XIP_KERNEL */
94
95#endif /* __ASSEMBLY__ */
96
70#endif /* _ASM_RISCV_ASM_H */
97#endif /* _ASM_RISCV_ASM_H */