pci.c (28f65c11f2ffb3957259dece647a24f8ad2e241b) pci.c (0e47ff1ce65bbd0b12a9421a2756b26987ea5083)
1/*
2 * Support for PCI bridges found on Power Macintoshes.
3 *
4 * Copyright (C) 2003-2005 Benjamin Herrenschmuidt (benh@kernel.crashing.org)
5 * Copyright (C) 1997 Paul Mackerras (paulus@samba.org)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License

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726 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000);
727 hose->cfg_data = ioremap(addr->start + 0xc00000, 0x1000);
728 init_bandit(hose);
729}
730
731static int __init setup_uninorth(struct pci_controller *hose,
732 struct resource *addr)
733{
1/*
2 * Support for PCI bridges found on Power Macintoshes.
3 *
4 * Copyright (C) 2003-2005 Benjamin Herrenschmuidt (benh@kernel.crashing.org)
5 * Copyright (C) 1997 Paul Mackerras (paulus@samba.org)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License

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726 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000);
727 hose->cfg_data = ioremap(addr->start + 0xc00000, 0x1000);
728 init_bandit(hose);
729}
730
731static int __init setup_uninorth(struct pci_controller *hose,
732 struct resource *addr)
733{
734 ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
734 pci_add_flags(PCI_REASSIGN_ALL_BUS);
735 has_uninorth = 1;
736 hose->ops = &macrisc_pci_ops;
737 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000);
738 hose->cfg_data = ioremap(addr->start + 0xc00000, 0x1000);
739 /* We "know" that the bridge at f2000000 has the PCI slots. */
740 return addr->start == 0xf2000000;
741}
742#endif /* CONFIG_PPC32 */

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833 printk(KERN_ERR "PCI: Failed to get U3/U4 HT resources !\n");
834 return;
835 }
836
837 /* Map external cfg space access into cfg_data and self registers
838 * into cfg_addr
839 */
840 hose->cfg_data = ioremap(cfg_res.start, 0x02000000);
735 has_uninorth = 1;
736 hose->ops = &macrisc_pci_ops;
737 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000);
738 hose->cfg_data = ioremap(addr->start + 0xc00000, 0x1000);
739 /* We "know" that the bridge at f2000000 has the PCI slots. */
740 return addr->start == 0xf2000000;
741}
742#endif /* CONFIG_PPC32 */

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833 printk(KERN_ERR "PCI: Failed to get U3/U4 HT resources !\n");
834 return;
835 }
836
837 /* Map external cfg space access into cfg_data and self registers
838 * into cfg_addr
839 */
840 hose->cfg_data = ioremap(cfg_res.start, 0x02000000);
841 hose->cfg_addr = ioremap(self_res.start, resource_size(&self_res));
841 hose->cfg_addr = ioremap(self_res.start,
842 self_res.end - self_res.start + 1);
842
843 /*
844 * /ht node doesn't expose a "ranges" property, we read the register
845 * that controls the decoding logic and use that for memory regions.
846 * The IO region is hard coded since it is fixed in HW as well.
847 */
848 hose->io_base_phys = 0xf4000000;
849 hose->pci_io_size = 0x00400000;

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992#endif /* CONFIG_PPC32 */
993}
994
995void __init pmac_pci_init(void)
996{
997 struct device_node *np, *root;
998 struct device_node *ht = NULL;
999
843
844 /*
845 * /ht node doesn't expose a "ranges" property, we read the register
846 * that controls the decoding logic and use that for memory regions.
847 * The IO region is hard coded since it is fixed in HW as well.
848 */
849 hose->io_base_phys = 0xf4000000;
850 hose->pci_io_size = 0x00400000;

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993#endif /* CONFIG_PPC32 */
994}
995
996void __init pmac_pci_init(void)
997{
998 struct device_node *np, *root;
999 struct device_node *ht = NULL;
1000
1000 ppc_pci_set_flags(PPC_PCI_CAN_SKIP_ISA_ALIGN);
1001 pci_set_flags(PCI_CAN_SKIP_ISA_ALIGN);
1001
1002 root = of_find_node_by_path("/");
1003 if (root == NULL) {
1004 printk(KERN_CRIT "pmac_pci_init: can't find root "
1005 "of device tree\n");
1006 return;
1007 }
1008 for (np = NULL; (np = of_get_next_child(root, np)) != NULL;) {

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1051 init_p2pbridge();
1052 init_second_ohare();
1053 fixup_nec_usb2();
1054
1055 /* We are still having some issues with the Xserve G4, enabling
1056 * some offset between bus number and domains for now when we
1057 * assign all busses should help for now
1058 */
1002
1003 root = of_find_node_by_path("/");
1004 if (root == NULL) {
1005 printk(KERN_CRIT "pmac_pci_init: can't find root "
1006 "of device tree\n");
1007 return;
1008 }
1009 for (np = NULL; (np = of_get_next_child(root, np)) != NULL;) {

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1052 init_p2pbridge();
1053 init_second_ohare();
1054 fixup_nec_usb2();
1055
1056 /* We are still having some issues with the Xserve G4, enabling
1057 * some offset between bus number and domains for now when we
1058 * assign all busses should help for now
1059 */
1059 if (ppc_pci_has_flag(PPC_PCI_REASSIGN_ALL_BUS))
1060 if (pci_has_flag(PCI_REASSIGN_ALL_BUS))
1060 pcibios_assign_bus_offset = 0x10;
1061#endif
1062}
1063
1064#ifdef CONFIG_PPC32
1065int pmac_pci_enable_device_hook(struct pci_dev *dev)
1066{
1067 struct device_node* node;

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1317 struct resource *r = &host->mem_resources[i];
1318 if (!(r->flags & IORESOURCE_MEM))
1319 continue;
1320 /* Skip the 0xf0xxxxxx..f2xxxxxx regions, we know they
1321 * are reserved by HW for other things
1322 */
1323 if (r->start >= 0xf0000000 && r->start < 0xf3000000)
1324 continue;
1061 pcibios_assign_bus_offset = 0x10;
1062#endif
1063}
1064
1065#ifdef CONFIG_PPC32
1066int pmac_pci_enable_device_hook(struct pci_dev *dev)
1067{
1068 struct device_node* node;

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1318 struct resource *r = &host->mem_resources[i];
1319 if (!(r->flags & IORESOURCE_MEM))
1320 continue;
1321 /* Skip the 0xf0xxxxxx..f2xxxxxx regions, we know they
1322 * are reserved by HW for other things
1323 */
1324 if (r->start >= 0xf0000000 && r->start < 0xf3000000)
1325 continue;
1325 if (!region || resource_size(r) > resource_size(region))
1326 if (!region || (r->end - r->start) >
1327 (region->end - region->start))
1326 region = r;
1327 }
1328 /* Nothing found, bail */
1329 if (region == 0)
1330 return;
1331
1332 /* Print things out */
1333 printk(KERN_INFO "PCI: Fixup U4 PCIe bridge range: %pR\n", region);

--- 12 unchanged lines hidden --- 		1328 region = r;
1329 }
1330 /* Nothing found, bail */
1331 if (region == 0)
1332 return;
1333
1334 /* Print things out */
1335 printk(KERN_INFO "PCI: Fixup U4 PCIe bridge range: %pR\n", region);

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