msi.c (e22b0d1bbf5bd71ed2b2fb54a257b5cc38c351c3) msi.c (e37e06af9b0d6b7828159455d33f8ef45c456460)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright 2007, Olof Johansson, PA Semi
4 *
5 * Based on arch/powerpc/sysdev/mpic_u3msi.c:
6 *
7 * Copyright 2006, Segher Boessenkool, IBM Corporation.
8 * Copyright 2006-2007, Michael Ellerman, IBM Corporation.

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57
58static void pasemi_msi_teardown_msi_irqs(struct pci_dev *pdev)
59{
60 struct msi_desc *entry;
61 irq_hw_number_t hwirq;
62
63 pr_debug("pasemi_msi_teardown_msi_irqs, pdev %p\n", pdev);
64
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright 2007, Olof Johansson, PA Semi
4 *
5 * Based on arch/powerpc/sysdev/mpic_u3msi.c:
6 *
7 * Copyright 2006, Segher Boessenkool, IBM Corporation.
8 * Copyright 2006-2007, Michael Ellerman, IBM Corporation.

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57
58static void pasemi_msi_teardown_msi_irqs(struct pci_dev *pdev)
59{
60 struct msi_desc *entry;
61 irq_hw_number_t hwirq;
62
63 pr_debug("pasemi_msi_teardown_msi_irqs, pdev %p\n", pdev);
64
65 msi_for_each_desc(entry, &pdev->dev, MSI_DESC_ASSOCIATED) {
65 for_each_pci_msi_entry(entry, pdev) {
66 if (!entry->irq)
67 continue;
68
66 hwirq = virq_to_hw(entry->irq);
67 irq_set_msi_desc(entry->irq, NULL);
68 irq_dispose_mapping(entry->irq);
69 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq, ALLOC_CHUNK);
70 }
69 hwirq = virq_to_hw(entry->irq);
70 irq_set_msi_desc(entry->irq, NULL);
71 irq_dispose_mapping(entry->irq);
72 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq, ALLOC_CHUNK);
73 }
74
75 return;
71}
72
73static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
74{
75 unsigned int virq;
76 struct msi_desc *entry;
77 struct msi_msg msg;
78 int hwirq;
79
80 if (type == PCI_CAP_ID_MSIX)
81 pr_debug("pasemi_msi: MSI-X untested, trying anyway\n");
82 pr_debug("pasemi_msi_setup_msi_irqs, pdev %p nvec %d type %d\n",
83 pdev, nvec, type);
84
85 msg.address_hi = 0;
86 msg.address_lo = PASEMI_MSI_ADDR;
87
76}
77
78static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
79{
80 unsigned int virq;
81 struct msi_desc *entry;
82 struct msi_msg msg;
83 int hwirq;
84
85 if (type == PCI_CAP_ID_MSIX)
86 pr_debug("pasemi_msi: MSI-X untested, trying anyway\n");
87 pr_debug("pasemi_msi_setup_msi_irqs, pdev %p nvec %d type %d\n",
88 pdev, nvec, type);
89
90 msg.address_hi = 0;
91 msg.address_lo = PASEMI_MSI_ADDR;
92
88 msi_for_each_desc(entry, &pdev->dev, MSI_DESC_NOTASSOCIATED) {
93 for_each_pci_msi_entry(entry, pdev) {
89 /* Allocate 16 interrupts for now, since that's the grouping for
90 * affinity. This can be changed later if it turns out 32 is too
91 * few MSIs for someone, but restrictions will apply to how the
92 * sources can be changed independently.
93 */
94 hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap,
95 ALLOC_CHUNK);
96 if (hwirq < 0) {

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125 */
126 msg.data = hwirq-0x200;
127 pci_write_msi_msg(virq, &msg);
128 }
129
130 return 0;
131}
132
94 /* Allocate 16 interrupts for now, since that's the grouping for
95 * affinity. This can be changed later if it turns out 32 is too
96 * few MSIs for someone, but restrictions will apply to how the
97 * sources can be changed independently.
98 */
99 hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap,
100 ALLOC_CHUNK);
101 if (hwirq < 0) {

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130 */
131 msg.data = hwirq-0x200;
132 pci_write_msi_msg(virq, &msg);
133 }
134
135 return 0;
136}
137
133int mpic_pasemi_msi_init(struct mpic *mpic)
138int __init mpic_pasemi_msi_init(struct mpic *mpic)
134{
135 int rc;
136 struct pci_controller *phb;
137 struct device_node *of_node;
138
139 of_node = irq_domain_get_of_node(mpic->irqhost);
140 if (!of_node ||
141 !of_device_is_compatible(of_node,

--- 20 unchanged lines hidden --- 		139{
140 int rc;
141 struct pci_controller *phb;
142 struct device_node *of_node;
143
144 of_node = irq_domain_get_of_node(mpic->irqhost);
145 if (!of_node ||
146 !of_device_is_compatible(of_node,

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