pci.c (d4bbf7e7759afc172e2bfbc5c416324590049cdd) pci.c (cad5cef62a5a0c525d39118d2e94b6e2034d5e05)
1/*
2 * CHRP pci routines.
3 */
4
5#include <linux/kernel.h>
6#include <linux/pci.h>
7#include <linux/delay.h>
8#include <linux/string.h>

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318/* SL82C105 IDE Control/Status Register */
319#define SL82C105_IDECSR 0x40
320
321/* Fixup for Winbond ATA quirk, required for briq mostly because the
322 * 8259 is configured for level sensitive IRQ 14 and so wants the
323 * ATA controller to be set to fully native mode or bad things
324 * will happen.
325 */
1/*
2 * CHRP pci routines.
3 */
4
5#include <linux/kernel.h>
6#include <linux/pci.h>
7#include <linux/delay.h>
8#include <linux/string.h>

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318/* SL82C105 IDE Control/Status Register */
319#define SL82C105_IDECSR 0x40
320
321/* Fixup for Winbond ATA quirk, required for briq mostly because the
322 * 8259 is configured for level sensitive IRQ 14 and so wants the
323 * ATA controller to be set to fully native mode or bad things
324 * will happen.
325 */
326static void __devinit chrp_pci_fixup_winbond_ata(struct pci_dev *sl82c105)
326static void chrp_pci_fixup_winbond_ata(struct pci_dev *sl82c105)
327{
328 u8 progif;
329
330 /* If non-briq machines need that fixup too, please speak up */
331 if (!machine_is(chrp) || _chrp_type != _CHRP_briq)
332 return;
333
334 if ((sl82c105->class & 5) != 5) {

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327{
328 u8 progif;
329
330 /* If non-briq machines need that fixup too, please speak up */
331 if (!machine_is(chrp) || _chrp_type != _CHRP_briq)
332 return;
333
334 if ((sl82c105->class & 5) != 5) {

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