Makefile (d585a021c0b10b0477d6b608c53e1feb8cde0507) | Makefile (3cc30d0726d258ac336283bcde66a8ab58283b61) |
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1obj-$(CONFIG_PPC_CELL_COMMON) += cbe_regs.o interrupt.o pervasive.o 2 3obj-$(CONFIG_PPC_CELL_NATIVE) += iommu.o setup.o spider-pic.o \ | 1obj-$(CONFIG_PPC_CELL_COMMON) += cbe_regs.o interrupt.o pervasive.o 2 3obj-$(CONFIG_PPC_CELL_NATIVE) += iommu.o setup.o spider-pic.o \ |
4 pmu.o io-workarounds.o spider-pci.o | 4 pmu.o spider-pci.o |
5obj-$(CONFIG_CBE_RAS) += ras.o 6 7obj-$(CONFIG_CBE_THERM) += cbe_thermal.o 8obj-$(CONFIG_CBE_CPUFREQ_PMI) += cbe_cpufreq_pmi.o 9obj-$(CONFIG_CBE_CPUFREQ) += cbe-cpufreq.o 10cbe-cpufreq-y += cbe_cpufreq_pervasive.o cbe_cpufreq.o 11obj-$(CONFIG_CBE_CPUFREQ_SPU_GOVERNOR) += cpufreq_spudemand.o 12 --- 21 unchanged lines hidden (view full) --- 34obj-$(CONFIG_PPC_CELL_QPACE) += qpace_setup.o 35 36# celleb stuff 37ifeq ($(CONFIG_PPC_CELLEB),y) 38obj-y += celleb_setup.o \ 39 celleb_pci.o celleb_scc_epci.o \ 40 celleb_scc_pciex.o \ 41 celleb_scc_uhc.o \ | 5obj-$(CONFIG_CBE_RAS) += ras.o 6 7obj-$(CONFIG_CBE_THERM) += cbe_thermal.o 8obj-$(CONFIG_CBE_CPUFREQ_PMI) += cbe_cpufreq_pmi.o 9obj-$(CONFIG_CBE_CPUFREQ) += cbe-cpufreq.o 10cbe-cpufreq-y += cbe_cpufreq_pervasive.o cbe_cpufreq.o 11obj-$(CONFIG_CBE_CPUFREQ_SPU_GOVERNOR) += cpufreq_spudemand.o 12 --- 21 unchanged lines hidden (view full) --- 34obj-$(CONFIG_PPC_CELL_QPACE) += qpace_setup.o 35 36# celleb stuff 37ifeq ($(CONFIG_PPC_CELLEB),y) 38obj-y += celleb_setup.o \ 39 celleb_pci.o celleb_scc_epci.o \ 40 celleb_scc_pciex.o \ 41 celleb_scc_uhc.o \ |
42 io-workarounds.o spider-pci.o \ 43 beat.o beat_htab.o beat_hvCall.o \ 44 beat_interrupt.o beat_iommu.o | 42 spider-pci.o beat.o beat_htab.o \ 43 beat_hvCall.o beat_interrupt.o \ 44 beat_iommu.o |
45 46obj-$(CONFIG_SMP) += beat_smp.o 47obj-$(CONFIG_PPC_UDBG_BEAT) += beat_udbg.o 48obj-$(CONFIG_SERIAL_TXX9) += celleb_scc_sio.o 49obj-$(CONFIG_SPU_BASE) += beat_spu_priv1.o 50endif | 45 46obj-$(CONFIG_SMP) += beat_smp.o 47obj-$(CONFIG_PPC_UDBG_BEAT) += beat_udbg.o 48obj-$(CONFIG_SERIAL_TXX9) += celleb_scc_sio.o 49obj-$(CONFIG_SPU_BASE) += beat_spu_priv1.o 50endif |