traps.c (b3bbcc5d1da1b654091dad15980b3d58fdae0fc6) | traps.c (dfc3095cec27f402c183da920f4733785e4c873d) |
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1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 4 * Copyright 2007-2010 Freescale Semiconductor, Inc. 5 * 6 * Modified by Cort Dougan (cort@cs.nmt.edu) 7 * and Paul Mackerras (paulus@samba.org) 8 */ --- 2071 unchanged lines hidden (view full) --- 2080 /* XXX quick hack for now: set the non-Java bit in the VSCR */ 2081 printk_ratelimited(KERN_ERR "Unrecognized altivec instruction " 2082 "in %s at %lx\n", current->comm, regs->nip); 2083 current->thread.vr_state.vscr.u[3] |= 0x10000; 2084 } 2085} 2086#endif /* CONFIG_ALTIVEC */ 2087 | 1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 4 * Copyright 2007-2010 Freescale Semiconductor, Inc. 5 * 6 * Modified by Cort Dougan (cort@cs.nmt.edu) 7 * and Paul Mackerras (paulus@samba.org) 8 */ --- 2071 unchanged lines hidden (view full) --- 2080 /* XXX quick hack for now: set the non-Java bit in the VSCR */ 2081 printk_ratelimited(KERN_ERR "Unrecognized altivec instruction " 2082 "in %s at %lx\n", current->comm, regs->nip); 2083 current->thread.vr_state.vscr.u[3] |= 0x10000; 2084 } 2085} 2086#endif /* CONFIG_ALTIVEC */ 2087 |
2088#ifdef CONFIG_FSL_BOOKE | 2088#ifdef CONFIG_PPC_85xx |
2089DEFINE_INTERRUPT_HANDLER(CacheLockingException) 2090{ 2091 unsigned long error_code = regs->dsisr; 2092 2093 /* We treat cache locking instructions from the user 2094 * as priv ops, in the future we could try to do 2095 * something smarter 2096 */ 2097 if (error_code & (ESR_DLK|ESR_ILK)) 2098 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); 2099 return; 2100} | 2089DEFINE_INTERRUPT_HANDLER(CacheLockingException) 2090{ 2091 unsigned long error_code = regs->dsisr; 2092 2093 /* We treat cache locking instructions from the user 2094 * as priv ops, in the future we could try to do 2095 * something smarter 2096 */ 2097 if (error_code & (ESR_DLK|ESR_ILK)) 2098 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); 2099 return; 2100} |
2101#endif /* CONFIG_FSL_BOOKE */ | 2101#endif /* CONFIG_PPC_85xx */ |
2102 2103#ifdef CONFIG_SPE 2104DEFINE_INTERRUPT_HANDLER(SPEFloatingPointException) 2105{ | 2102 2103#ifdef CONFIG_SPE 2104DEFINE_INTERRUPT_HANDLER(SPEFloatingPointException) 2105{ |
2106 extern int do_spe_mathemu(struct pt_regs *regs); | |
2107 unsigned long spefscr; 2108 int fpexc_mode; 2109 int code = FPE_FLTUNK; 2110 int err; 2111 2112 interrupt_cond_local_irq_enable(regs); 2113 2114 flush_spe_to_thread(current); --- 33 unchanged lines hidden (view full) --- 2148 _exception(SIGFPE, regs, code, regs->nip); 2149 } 2150 2151 return; 2152} 2153 2154DEFINE_INTERRUPT_HANDLER(SPEFloatingPointRoundException) 2155{ | 2106 unsigned long spefscr; 2107 int fpexc_mode; 2108 int code = FPE_FLTUNK; 2109 int err; 2110 2111 interrupt_cond_local_irq_enable(regs); 2112 2113 flush_spe_to_thread(current); --- 33 unchanged lines hidden (view full) --- 2147 _exception(SIGFPE, regs, code, regs->nip); 2148 } 2149 2150 return; 2151} 2152 2153DEFINE_INTERRUPT_HANDLER(SPEFloatingPointRoundException) 2154{ |
2156 extern int speround_handler(struct pt_regs *regs); | |
2157 int err; 2158 2159 interrupt_cond_local_irq_enable(regs); 2160 2161 preempt_disable(); 2162 if (regs->msr & MSR_SPE) 2163 giveup_spe(current); 2164 preempt_enable(); --- 136 unchanged lines hidden --- | 2155 int err; 2156 2157 interrupt_cond_local_irq_enable(regs); 2158 2159 preempt_disable(); 2160 if (regs->msr & MSR_SPE) 2161 giveup_spe(current); 2162 preempt_enable(); --- 136 unchanged lines hidden --- |