pci_32.c (803d4573e60bc890d7fbc040ad1c18c2dc7f8279) pci_32.c (68a64357d15ae4f596e92715719071952006e83c)
1/*
2 * Common pmac/prep/chrp pci routines. -- Cort
3 */
4
5#include <linux/kernel.h>
6#include <linux/pci.h>
7#include <linux/delay.h>
8#include <linux/string.h>

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1556 if (hose == 0)
1557 return NULL; /* should never happen */
1558
1559 /* If memory, add on the PCI bridge address offset */
1560 if (mmap_state == pci_mmap_mem) {
1561 *offset += hose->pci_mem_offset;
1562 res_bit = IORESOURCE_MEM;
1563 } else {
1/*
2 * Common pmac/prep/chrp pci routines. -- Cort
3 */
4
5#include <linux/kernel.h>
6#include <linux/pci.h>
7#include <linux/delay.h>
8#include <linux/string.h>

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1556 if (hose == 0)
1557 return NULL; /* should never happen */
1558
1559 /* If memory, add on the PCI bridge address offset */
1560 if (mmap_state == pci_mmap_mem) {
1561 *offset += hose->pci_mem_offset;
1562 res_bit = IORESOURCE_MEM;
1563 } else {
1564 io_offset = hose->io_base_virt - ___IO_BASE;
1564 io_offset = hose->io_base_virt - (void __iomem *)_IO_BASE;
1565 *offset += io_offset;
1566 res_bit = IORESOURCE_IO;
1567 }
1568
1569 /*
1570 * Check that the offset requested corresponds to one of the
1571 * resources of the device.
1572 */

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1811{
1812 struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
1813 unsigned long offset = 0;
1814
1815 if (hose == NULL)
1816 return;
1817
1818 if (rsrc->flags & IORESOURCE_IO)
1565 *offset += io_offset;
1566 res_bit = IORESOURCE_IO;
1567 }
1568
1569 /*
1570 * Check that the offset requested corresponds to one of the
1571 * resources of the device.
1572 */

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1811{
1812 struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
1813 unsigned long offset = 0;
1814
1815 if (hose == NULL)
1816 return;
1817
1818 if (rsrc->flags & IORESOURCE_IO)
1819 offset = ___IO_BASE - hose->io_base_virt + hose->io_base_phys;
1819 offset = (void __iomem *)_IO_BASE - hose->io_base_virt
1820 + hose->io_base_phys;
1820
1821 *start = rsrc->start + offset;
1822 *end = rsrc->end + offset;
1823}
1824
1825void __init
1826pci_init_resource(struct resource *res, unsigned long start, unsigned long end,
1827 int flags, char *name)
1828{
1829 res->start = start;
1830 res->end = end;
1831 res->flags = flags;
1832 res->name = name;
1833 res->parent = NULL;
1834 res->sibling = NULL;
1835 res->child = NULL;
1836}
1837
1821
1822 *start = rsrc->start + offset;
1823 *end = rsrc->end + offset;
1824}
1825
1826void __init
1827pci_init_resource(struct resource *res, unsigned long start, unsigned long end,
1828 int flags, char *name)
1829{
1830 res->start = start;
1831 res->end = end;
1832 res->flags = flags;
1833 res->name = name;
1834 res->parent = NULL;
1835 res->sibling = NULL;
1836 res->child = NULL;
1837}
1838
1838void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max)
1839{
1840 unsigned long start = pci_resource_start(dev, bar);
1841 unsigned long len = pci_resource_len(dev, bar);
1842 unsigned long flags = pci_resource_flags(dev, bar);
1843
1844 if (!len)
1845 return NULL;
1846 if (max && len > max)
1847 len = max;
1848 if (flags & IORESOURCE_IO)
1849 return ioport_map(start, len);
1850 if (flags & IORESOURCE_MEM)
1851 /* Not checking IORESOURCE_CACHEABLE because PPC does
1852 * not currently distinguish between ioremap and
1853 * ioremap_nocache.
1854 */
1855 return ioremap(start, len);
1856 /* What? */
1857 return NULL;
1858}
1859
1860void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
1861{
1862 /* Nothing to do */
1863}
1864EXPORT_SYMBOL(pci_iomap);
1865EXPORT_SYMBOL(pci_iounmap);
1866
1867unsigned long pci_address_to_pio(phys_addr_t address)
1868{
1869 struct pci_controller* hose = hose_head;
1870
1871 for (; hose; hose = hose->next) {
1872 unsigned int size = hose->io_resource.end -
1873 hose->io_resource.start + 1;
1874 if (address >= hose->io_base_phys &&

--- 75 unchanged lines hidden --- 		1839unsigned long pci_address_to_pio(phys_addr_t address)
1840{
1841 struct pci_controller* hose = hose_head;
1842
1843 for (; hose; hose = hose->next) {
1844 unsigned int size = hose->io_resource.end -
1845 hose->io_resource.start + 1;
1846 if (address >= hose->io_base_phys &&

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