| head_85xx.S (002c6ca75289a4ac4f6738213dd2d258704886e4) | head_85xx.S (2da37761671b5bdedbe04e6469cfa57cd6b6ae45) |
|---|---|
| 1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * Kernel execution entry point code. 4 * 5 * Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org> 6 * Initial PowerPC version. 7 * Copyright (c) 1996 Cort Dougan <cort@cs.nmt.edu> 8 * Rewritten for PReP --- 15 unchanged lines hidden (view full) --- 24 * PowerPC 44x support, Matt Porter <mporter@kernel.crashing.org> 25 * Copyright 2004 Freescale Semiconductor, Inc 26 * PowerPC e500 modifications, Kumar Gala <galak@kernel.crashing.org> 27 */ 28 29#include <linux/init.h> 30#include <linux/threads.h> 31#include <linux/pgtable.h> | 1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * Kernel execution entry point code. 4 * 5 * Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org> 6 * Initial PowerPC version. 7 * Copyright (c) 1996 Cort Dougan <cort@cs.nmt.edu> 8 * Rewritten for PReP --- 15 unchanged lines hidden (view full) --- 24 * PowerPC 44x support, Matt Porter <mporter@kernel.crashing.org> 25 * Copyright 2004 Freescale Semiconductor, Inc 26 * PowerPC e500 modifications, Kumar Gala <galak@kernel.crashing.org> 27 */ 28 29#include <linux/init.h> 30#include <linux/threads.h> 31#include <linux/pgtable.h> |
| 32#include <linux/linkage.h> 33 |
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| 32#include <asm/processor.h> 33#include <asm/page.h> 34#include <asm/mmu.h> 35#include <asm/cputable.h> 36#include <asm/thread_info.h> 37#include <asm/ppc_asm.h> 38#include <asm/asm-offsets.h> 39#include <asm/cache.h> --- 840 unchanged lines hidden (view full) --- 880 .align 4,0 881 882#endif /* CONFIG_SPE */ 883 884/* 885 * Translate the effec addr in r3 to phys addr. The phys addr will be put 886 * into r3(higher 32bit) and r4(lower 32bit) 887 */ | 34#include <asm/processor.h> 35#include <asm/page.h> 36#include <asm/mmu.h> 37#include <asm/cputable.h> 38#include <asm/thread_info.h> 39#include <asm/ppc_asm.h> 40#include <asm/asm-offsets.h> 41#include <asm/cache.h> --- 840 unchanged lines hidden (view full) --- 882 .align 4,0 883 884#endif /* CONFIG_SPE */ 885 886/* 887 * Translate the effec addr in r3 to phys addr. The phys addr will be put 888 * into r3(higher 32bit) and r4(lower 32bit) 889 */ |
| 888get_phys_addr: | 890SYM_FUNC_START_LOCAL(get_phys_addr) |
| 889 mfmsr r8 890 mfspr r9,SPRN_PID 891 rlwinm r9,r9,16,0x3fff0000 /* turn PID into MAS6[SPID] */ 892 rlwimi r9,r8,28,0x00000001 /* turn MSR[DS] into MAS6[SAS] */ 893 mtspr SPRN_MAS6,r9 894 895 tlbsx 0,r3 /* must succeed */ 896 --- 5 unchanged lines hidden (view full) --- 902 addi r10,r10,-1 903 and r11,r3,r10 /* r11 = page offset */ 904 andc r4,r12,r10 /* r4 = page base */ 905 or r4,r4,r11 /* r4 = devtree phys addr */ 906#ifdef CONFIG_PHYS_64BIT 907 mfspr r3,SPRN_MAS7 908#endif 909 blr | 891 mfmsr r8 892 mfspr r9,SPRN_PID 893 rlwinm r9,r9,16,0x3fff0000 /* turn PID into MAS6[SPID] */ 894 rlwimi r9,r8,28,0x00000001 /* turn MSR[DS] into MAS6[SAS] */ 895 mtspr SPRN_MAS6,r9 896 897 tlbsx 0,r3 /* must succeed */ 898 --- 5 unchanged lines hidden (view full) --- 904 addi r10,r10,-1 905 and r11,r3,r10 /* r11 = page offset */ 906 andc r4,r12,r10 /* r4 = page base */ 907 or r4,r4,r11 /* r4 = devtree phys addr */ 908#ifdef CONFIG_PHYS_64BIT 909 mfspr r3,SPRN_MAS7 910#endif 911 blr |
| 912SYM_FUNC_END(get_phys_addr) |
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| 910 911/* 912 * Global functions 913 */ 914 915#ifdef CONFIG_PPC_E500 916#ifndef CONFIG_PPC_E500MC 917/* Adjust or setup IVORs for e500v1/v2 */ --- 310 unchanged lines hidden --- | 913 914/* 915 * Global functions 916 */ 917 918#ifdef CONFIG_PPC_E500 919#ifndef CONFIG_PPC_E500MC 920/* Adjust or setup IVORs for e500v1/v2 */ --- 310 unchanged lines hidden --- |