| entry_32.S (6cb7bfebb145af5ea1d052512a2ae7ff07a47202) | entry_32.S (033ef338b6e007dc081c6282a4f2a9dd761f8cd2) |
|---|---|
| 1/* 2 * PowerPC version 3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 4 * Rewritten by Cort Dougan (cort@fsmlabs.com) for PReP 5 * Copyright (C) 1996 Cort Dougan <cort@fsmlabs.com> 6 * Adapted for Power Macintosh by Paul Mackerras. 7 * Low-level exception handlers and MMU support 8 * rewritten by Paul Mackerras. --- 940 unchanged lines hidden (view full) --- 949 950 .comm ee_restarts,4 951 952/* 953 * PROM code for specific machines follows. Put it 954 * here so it's easy to add arch-specific sections later. 955 * -- Cort 956 */ | 1/* 2 * PowerPC version 3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 4 * Rewritten by Cort Dougan (cort@fsmlabs.com) for PReP 5 * Copyright (C) 1996 Cort Dougan <cort@fsmlabs.com> 6 * Adapted for Power Macintosh by Paul Mackerras. 7 * Low-level exception handlers and MMU support 8 * rewritten by Paul Mackerras. --- 940 unchanged lines hidden (view full) --- 949 950 .comm ee_restarts,4 951 952/* 953 * PROM code for specific machines follows. Put it 954 * here so it's easy to add arch-specific sections later. 955 * -- Cort 956 */ |
| 957#ifdef CONFIG_PPC_OF | 957#ifdef CONFIG_PPC_RTAS |
| 958/* 959 * On CHRP, the Run-Time Abstraction Services (RTAS) have to be 960 * called with the MMU off. 961 */ 962_GLOBAL(enter_rtas) 963 stwu r1,-INT_FRAME_SIZE(r1) 964 mflr r0 965 stw r0,INT_FRAME_SIZE+4(r1) | 958/* 959 * On CHRP, the Run-Time Abstraction Services (RTAS) have to be 960 * called with the MMU off. 961 */ 962_GLOBAL(enter_rtas) 963 stwu r1,-INT_FRAME_SIZE(r1) 964 mflr r0 965 stw r0,INT_FRAME_SIZE+4(r1) |
| 966 lis r4,rtas_data@ha 967 lwz r4,rtas_data@l(r4) | 966 LOADADDR(r4, rtas) |
| 968 lis r6,1f@ha /* physical return address for rtas */ 969 addi r6,r6,1f@l 970 tophys(r6,r6) 971 tophys(r7,r1) | 967 lis r6,1f@ha /* physical return address for rtas */ 968 addi r6,r6,1f@l 969 tophys(r6,r6) 970 tophys(r7,r1) |
| 972 lis r8,rtas_entry@ha 973 lwz r8,rtas_entry@l(r8) | 971 lwz r8,RTASENTRY(r4) 972 lwz r4,RTASBASE(r4) |
| 974 mfmsr r9 975 stw r9,8(r1) 976 LOAD_MSR_KERNEL(r0,MSR_KERNEL) 977 SYNC /* disable interrupts so SRR0/1 */ 978 MTMSRD(r0) /* don't get trashed */ 979 li r9,MSR_KERNEL & ~(MSR_IR|MSR_DR) 980 mtlr r6 | 973 mfmsr r9 974 stw r9,8(r1) 975 LOAD_MSR_KERNEL(r0,MSR_KERNEL) 976 SYNC /* disable interrupts so SRR0/1 */ 977 MTMSRD(r0) /* don't get trashed */ 978 li r9,MSR_KERNEL & ~(MSR_IR|MSR_DR) 979 mtlr r6 |
| 981 CLR_TOP32(r7) | |
| 982 mtspr SPRN_SPRG2,r7 983 mtspr SPRN_SRR0,r8 984 mtspr SPRN_SRR1,r9 985 RFI 9861: tophys(r9,r1) 987 lwz r8,INT_FRAME_SIZE+4(r9) /* get return address */ 988 lwz r9,8(r9) /* original msr value */ 989 FIX_SRR1(r9,r0) --- 4 unchanged lines hidden (view full) --- 994 mtspr SPRN_SRR1,r9 995 RFI /* return to caller */ 996 997 .globl machine_check_in_rtas 998machine_check_in_rtas: 999 twi 31,0,0 1000 /* XXX load up BATs and panic */ 1001 | 980 mtspr SPRN_SPRG2,r7 981 mtspr SPRN_SRR0,r8 982 mtspr SPRN_SRR1,r9 983 RFI 9841: tophys(r9,r1) 985 lwz r8,INT_FRAME_SIZE+4(r9) /* get return address */ 986 lwz r9,8(r9) /* original msr value */ 987 FIX_SRR1(r9,r0) --- 4 unchanged lines hidden (view full) --- 992 mtspr SPRN_SRR1,r9 993 RFI /* return to caller */ 994 995 .globl machine_check_in_rtas 996machine_check_in_rtas: 997 twi 31,0,0 998 /* XXX load up BATs and panic */ 999 |
| 1002#endif /* CONFIG_PPC_OF */ | 1000#endif /* CONFIG_PPC_RTAS */ |