| entry_32.S (1e05a7e6ebc4a5a5c53dce32e7e6d0ff5e7e08d1) | entry_32.S (12c3f1fd87bf4e55f06d079a45d6f15e2f6f9750) |
|---|---|
| 1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * PowerPC version 4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 5 * Rewritten by Cort Dougan (cort@fsmlabs.com) for PReP 6 * Copyright (C) 1996 Cort Dougan <cort@fsmlabs.com> 7 * Adapted for Power Macintosh by Paul Mackerras. 8 * Low-level exception handlers and MMU support --- 216 unchanged lines hidden (view full) --- 225 226#ifdef CONFIG_TRACE_IRQFLAGS 2271: /* MSR is changing, re-enable MMU so we can notify lockdep. We need to 228 * keep interrupts disabled at this point otherwise we might risk 229 * taking an interrupt before we tell lockdep they are enabled. 230 */ 231 lis r12,reenable_mmu@h 232 ori r12,r12,reenable_mmu@l | 1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * PowerPC version 4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 5 * Rewritten by Cort Dougan (cort@fsmlabs.com) for PReP 6 * Copyright (C) 1996 Cort Dougan <cort@fsmlabs.com> 7 * Adapted for Power Macintosh by Paul Mackerras. 8 * Low-level exception handlers and MMU support --- 216 unchanged lines hidden (view full) --- 225 226#ifdef CONFIG_TRACE_IRQFLAGS 2271: /* MSR is changing, re-enable MMU so we can notify lockdep. We need to 228 * keep interrupts disabled at this point otherwise we might risk 229 * taking an interrupt before we tell lockdep they are enabled. 230 */ 231 lis r12,reenable_mmu@h 232 ori r12,r12,reenable_mmu@l |
| 233 LOAD_MSR_KERNEL(r0, MSR_KERNEL) | 233 LOAD_REG_IMMEDIATE(r0, MSR_KERNEL) |
| 234 mtspr SPRN_SRR0,r12 235 mtspr SPRN_SRR1,r0 236 SYNC 237 RFI 238 239reenable_mmu: 240 /* 241 * We save a bunch of GPRs, --- 57 unchanged lines hidden (view full) --- 299 ble 5b /* r1 <= &_end is OK */ 300 SAVE_NVGPRS(r11) 301 addi r3,r1,STACK_FRAME_OVERHEAD 302 lis r1,init_thread_union@ha 303 addi r1,r1,init_thread_union@l 304 addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD 305 lis r9,StackOverflow@ha 306 addi r9,r9,StackOverflow@l | 234 mtspr SPRN_SRR0,r12 235 mtspr SPRN_SRR1,r0 236 SYNC 237 RFI 238 239reenable_mmu: 240 /* 241 * We save a bunch of GPRs, --- 57 unchanged lines hidden (view full) --- 299 ble 5b /* r1 <= &_end is OK */ 300 SAVE_NVGPRS(r11) 301 addi r3,r1,STACK_FRAME_OVERHEAD 302 lis r1,init_thread_union@ha 303 addi r1,r1,init_thread_union@l 304 addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD 305 lis r9,StackOverflow@ha 306 addi r9,r9,StackOverflow@l |
| 307 LOAD_MSR_KERNEL(r10,MSR_KERNEL) | 307 LOAD_REG_IMMEDIATE(r10,MSR_KERNEL) |
| 308#if defined(CONFIG_PPC_8xx) && defined(CONFIG_PERF_EVENTS) 309 mtspr SPRN_NRI, r0 310#endif 311 mtspr SPRN_SRR0,r9 312 mtspr SPRN_SRR1,r10 313 SYNC 314 RFI 315 316#ifdef CONFIG_TRACE_IRQFLAGS 317trace_syscall_entry_irq_off: 318 /* 319 * Syscall shouldn't happen while interrupts are disabled, 320 * so let's do a warning here. 321 */ 3220: trap 323 EMIT_BUG_ENTRY 0b,__FILE__,__LINE__, BUGFLAG_WARNING 324 bl trace_hardirqs_on 325 326 /* Now enable for real */ | 308#if defined(CONFIG_PPC_8xx) && defined(CONFIG_PERF_EVENTS) 309 mtspr SPRN_NRI, r0 310#endif 311 mtspr SPRN_SRR0,r9 312 mtspr SPRN_SRR1,r10 313 SYNC 314 RFI 315 316#ifdef CONFIG_TRACE_IRQFLAGS 317trace_syscall_entry_irq_off: 318 /* 319 * Syscall shouldn't happen while interrupts are disabled, 320 * so let's do a warning here. 321 */ 3220: trap 323 EMIT_BUG_ENTRY 0b,__FILE__,__LINE__, BUGFLAG_WARNING 324 bl trace_hardirqs_on 325 326 /* Now enable for real */ |
| 327 LOAD_MSR_KERNEL(r10, MSR_KERNEL | MSR_EE) | 327 LOAD_REG_IMMEDIATE(r10, MSR_KERNEL | MSR_EE) |
| 328 mtmsr r10 329 330 REST_GPR(0, r1) 331 REST_4GPRS(3, r1) 332 REST_2GPRS(7, r1) 333 b DoSyscall 334#endif /* CONFIG_TRACE_IRQFLAGS */ 335 --- 53 unchanged lines hidden (view full) --- 389 /* Check whether the syscall is issued inside a restartable sequence */ 390 stw r3,GPR3(r1) 391 addi r3,r1,STACK_FRAME_OVERHEAD 392 bl rseq_syscall 393 lwz r3,GPR3(r1) 394#endif 395 mr r6,r3 396 /* disable interrupts so current_thread_info()->flags can't change */ | 328 mtmsr r10 329 330 REST_GPR(0, r1) 331 REST_4GPRS(3, r1) 332 REST_2GPRS(7, r1) 333 b DoSyscall 334#endif /* CONFIG_TRACE_IRQFLAGS */ 335 --- 53 unchanged lines hidden (view full) --- 389 /* Check whether the syscall is issued inside a restartable sequence */ 390 stw r3,GPR3(r1) 391 addi r3,r1,STACK_FRAME_OVERHEAD 392 bl rseq_syscall 393 lwz r3,GPR3(r1) 394#endif 395 mr r6,r3 396 /* disable interrupts so current_thread_info()->flags can't change */ |
| 397 LOAD_MSR_KERNEL(r10,MSR_KERNEL) /* doesn't include MSR_EE */ | 397 LOAD_REG_IMMEDIATE(r10,MSR_KERNEL) /* doesn't include MSR_EE */ |
| 398 /* Note: We don't bother telling lockdep about it */ 399 SYNC 400 MTMSRD(r10) 401 lwz r9,TI_FLAGS(r2) 402 li r8,-MAX_ERRNO 403 andi. r0,r9,(_TIF_SYSCALL_DOTRACE|_TIF_SINGLESTEP|_TIF_USER_WORK_MASK|_TIF_PERSYSCALL_MASK) 404 bne- syscall_exit_work 405 cmplw 0,r3,r8 --- 366 unchanged lines hidden (view full) --- 772 SYNC 773 RFI 774 775#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE)) 776/* check if the exception happened in a restartable section */ 7771: lis r3,exc_exit_restart_end@ha 778 addi r3,r3,exc_exit_restart_end@l 779 cmplw r12,r3 | 398 /* Note: We don't bother telling lockdep about it */ 399 SYNC 400 MTMSRD(r10) 401 lwz r9,TI_FLAGS(r2) 402 li r8,-MAX_ERRNO 403 andi. r0,r9,(_TIF_SYSCALL_DOTRACE|_TIF_SINGLESTEP|_TIF_USER_WORK_MASK|_TIF_PERSYSCALL_MASK) 404 bne- syscall_exit_work 405 cmplw 0,r3,r8 --- 366 unchanged lines hidden (view full) --- 772 SYNC 773 RFI 774 775#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE)) 776/* check if the exception happened in a restartable section */ 7771: lis r3,exc_exit_restart_end@ha 778 addi r3,r3,exc_exit_restart_end@l 779 cmplw r12,r3 |
| 780#if CONFIG_PPC_BOOK3S_601 781 bge 2b 782#else |
|
| 780 bge 3f | 783 bge 3f |
| 784#endif |
|
| 781 lis r4,exc_exit_restart@ha 782 addi r4,r4,exc_exit_restart@l 783 cmplw r12,r4 | 785 lis r4,exc_exit_restart@ha 786 addi r4,r4,exc_exit_restart@l 787 cmplw r12,r4 |
| 788#if CONFIG_PPC_BOOK3S_601 789 blt 2b 790#else |
|
| 784 blt 3f | 791 blt 3f |
| 792#endif |
|
| 785 lis r3,fee_restarts@ha 786 tophys(r3,r3) 787 lwz r5,fee_restarts@l(r3) 788 addi r5,r5,1 789 stw r5,fee_restarts@l(r3) 790 mr r12,r4 /* restart at exc_exit_restart */ 791 b 2b 792 793 .section .bss 794 .align 2 795fee_restarts: 796 .space 4 797 .previous 798 799/* aargh, a nonrecoverable interrupt, panic */ 800/* aargh, we don't know which trap this is */ 801/* but the 601 doesn't implement the RI bit, so assume it's OK */ 8023: | 793 lis r3,fee_restarts@ha 794 tophys(r3,r3) 795 lwz r5,fee_restarts@l(r3) 796 addi r5,r5,1 797 stw r5,fee_restarts@l(r3) 798 mr r12,r4 /* restart at exc_exit_restart */ 799 b 2b 800 801 .section .bss 802 .align 2 803fee_restarts: 804 .space 4 805 .previous 806 807/* aargh, a nonrecoverable interrupt, panic */ 808/* aargh, we don't know which trap this is */ 809/* but the 601 doesn't implement the RI bit, so assume it's OK */ 8103: |
| 803BEGIN_FTR_SECTION 804 b 2b 805END_FTR_SECTION_IFSET(CPU_FTR_601) | |
| 806 li r10,-1 807 stw r10,_TRAP(r11) 808 addi r3,r1,STACK_FRAME_OVERHEAD 809 lis r10,MSR_KERNEL@h 810 ori r10,r10,MSR_KERNEL@l 811 bl transfer_to_handler_full 812 .long unrecoverable_exception 813 .long ret_from_except --- 5 unchanged lines hidden (view full) --- 819 /* fall through */ 820 821 .globl ret_from_except 822ret_from_except: 823 /* Hard-disable interrupts so that current_thread_info()->flags 824 * can't change between when we test it and when we return 825 * from the interrupt. */ 826 /* Note: We don't bother telling lockdep about it */ | 811 li r10,-1 812 stw r10,_TRAP(r11) 813 addi r3,r1,STACK_FRAME_OVERHEAD 814 lis r10,MSR_KERNEL@h 815 ori r10,r10,MSR_KERNEL@l 816 bl transfer_to_handler_full 817 .long unrecoverable_exception 818 .long ret_from_except --- 5 unchanged lines hidden (view full) --- 824 /* fall through */ 825 826 .globl ret_from_except 827ret_from_except: 828 /* Hard-disable interrupts so that current_thread_info()->flags 829 * can't change between when we test it and when we return 830 * from the interrupt. */ 831 /* Note: We don't bother telling lockdep about it */ |
| 827 LOAD_MSR_KERNEL(r10,MSR_KERNEL) | 832 LOAD_REG_IMMEDIATE(r10,MSR_KERNEL) |
| 828 SYNC /* Some chip revs have problems here... */ 829 MTMSRD(r10) /* disable interrupts */ 830 831 lwz r3,_MSR(r1) /* Returning to user mode? */ 832 andi. r0,r3,MSR_PR 833 beq resume_kernel 834 835user_exc_return: /* r10 contains MSR_KERNEL here */ --- 150 unchanged lines hidden (view full) --- 986 * Once we put values in SRR0 and SRR1, we are in a state 987 * where exceptions are not recoverable, since taking an 988 * exception will trash SRR0 and SRR1. Therefore we clear the 989 * MSR:RI bit to indicate this. If we do take an exception, 990 * we can't return to the point of the exception but we 991 * can restart the exception exit path at the label 992 * exc_exit_restart below. -- paulus 993 */ | 833 SYNC /* Some chip revs have problems here... */ 834 MTMSRD(r10) /* disable interrupts */ 835 836 lwz r3,_MSR(r1) /* Returning to user mode? */ 837 andi. r0,r3,MSR_PR 838 beq resume_kernel 839 840user_exc_return: /* r10 contains MSR_KERNEL here */ --- 150 unchanged lines hidden (view full) --- 991 * Once we put values in SRR0 and SRR1, we are in a state 992 * where exceptions are not recoverable, since taking an 993 * exception will trash SRR0 and SRR1. Therefore we clear the 994 * MSR:RI bit to indicate this. If we do take an exception, 995 * we can't return to the point of the exception but we 996 * can restart the exception exit path at the label 997 * exc_exit_restart below. -- paulus 998 */ |
| 994 LOAD_MSR_KERNEL(r10,MSR_KERNEL & ~MSR_RI) | 999 LOAD_REG_IMMEDIATE(r10,MSR_KERNEL & ~MSR_RI) |
| 995 SYNC 996 MTMSRD(r10) /* clear the RI bit */ 997 .globl exc_exit_restart 998exc_exit_restart: 999 lwz r12,_NIP(r1) 1000 mtspr SPRN_SRR0,r12 1001 mtspr SPRN_SRR1,r9 1002 REST_4GPRS(9, r1) --- 58 unchanged lines hidden (view full) --- 1061#else 1062#define PPC_40x_TURN_OFF_MSR_DR 1063#endif 1064 1065#define RET_FROM_EXC_LEVEL(exc_lvl_srr0, exc_lvl_srr1, exc_lvl_rfi) \ 1066 REST_NVGPRS(r1); \ 1067 lwz r3,_MSR(r1); \ 1068 andi. r3,r3,MSR_PR; \ | 1000 SYNC 1001 MTMSRD(r10) /* clear the RI bit */ 1002 .globl exc_exit_restart 1003exc_exit_restart: 1004 lwz r12,_NIP(r1) 1005 mtspr SPRN_SRR0,r12 1006 mtspr SPRN_SRR1,r9 1007 REST_4GPRS(9, r1) --- 58 unchanged lines hidden (view full) --- 1066#else 1067#define PPC_40x_TURN_OFF_MSR_DR 1068#endif 1069 1070#define RET_FROM_EXC_LEVEL(exc_lvl_srr0, exc_lvl_srr1, exc_lvl_rfi) \ 1071 REST_NVGPRS(r1); \ 1072 lwz r3,_MSR(r1); \ 1073 andi. r3,r3,MSR_PR; \ |
| 1069 LOAD_MSR_KERNEL(r10,MSR_KERNEL); \ | 1074 LOAD_REG_IMMEDIATE(r10,MSR_KERNEL); \ |
| 1070 bne user_exc_return; \ 1071 lwz r0,GPR0(r1); \ 1072 lwz r2,GPR2(r1); \ 1073 REST_4GPRS(3, r1); \ 1074 REST_2GPRS(7, r1); \ 1075 lwz r10,_XER(r1); \ 1076 lwz r11,_CTR(r1); \ 1077 mtspr SPRN_XER,r10; \ --- 153 unchanged lines hidden (view full) --- 1231 SYNC 1232 MTMSRD(r10) /* hard-enable interrupts */ 1233 bl schedule 1234recheck: 1235 /* Note: And we don't tell it we are disabling them again 1236 * neither. Those disable/enable cycles used to peek at 1237 * TI_FLAGS aren't advertised. 1238 */ | 1075 bne user_exc_return; \ 1076 lwz r0,GPR0(r1); \ 1077 lwz r2,GPR2(r1); \ 1078 REST_4GPRS(3, r1); \ 1079 REST_2GPRS(7, r1); \ 1080 lwz r10,_XER(r1); \ 1081 lwz r11,_CTR(r1); \ 1082 mtspr SPRN_XER,r10; \ --- 153 unchanged lines hidden (view full) --- 1236 SYNC 1237 MTMSRD(r10) /* hard-enable interrupts */ 1238 bl schedule 1239recheck: 1240 /* Note: And we don't tell it we are disabling them again 1241 * neither. Those disable/enable cycles used to peek at 1242 * TI_FLAGS aren't advertised. 1243 */ |
| 1239 LOAD_MSR_KERNEL(r10,MSR_KERNEL) | 1244 LOAD_REG_IMMEDIATE(r10,MSR_KERNEL) |
| 1240 SYNC 1241 MTMSRD(r10) /* disable interrupts */ 1242 lwz r9,TI_FLAGS(r2) 1243 andi. r0,r9,_TIF_NEED_RESCHED 1244 bne- do_resched 1245 andi. r0,r9,_TIF_USER_WORK_MASK 1246 beq restore_user 1247do_user_signal: /* r10 contains MSR_KERNEL here */ --- 17 unchanged lines hidden (view full) --- 1265 * We come here when we are at the end of handling an exception 1266 * that occurred at a place where taking an exception will lose 1267 * state information, such as the contents of SRR0 and SRR1. 1268 */ 1269nonrecoverable: 1270 lis r10,exc_exit_restart_end@ha 1271 addi r10,r10,exc_exit_restart_end@l 1272 cmplw r12,r10 | 1245 SYNC 1246 MTMSRD(r10) /* disable interrupts */ 1247 lwz r9,TI_FLAGS(r2) 1248 andi. r0,r9,_TIF_NEED_RESCHED 1249 bne- do_resched 1250 andi. r0,r9,_TIF_USER_WORK_MASK 1251 beq restore_user 1252do_user_signal: /* r10 contains MSR_KERNEL here */ --- 17 unchanged lines hidden (view full) --- 1270 * We come here when we are at the end of handling an exception 1271 * that occurred at a place where taking an exception will lose 1272 * state information, such as the contents of SRR0 and SRR1. 1273 */ 1274nonrecoverable: 1275 lis r10,exc_exit_restart_end@ha 1276 addi r10,r10,exc_exit_restart_end@l 1277 cmplw r12,r10 |
| 1278#ifdef CONFIG_PPC_BOOK3S_601 1279 bgelr 1280#else |
|
| 1273 bge 3f | 1281 bge 3f |
| 1282#endif |
|
| 1274 lis r11,exc_exit_restart@ha 1275 addi r11,r11,exc_exit_restart@l 1276 cmplw r12,r11 | 1283 lis r11,exc_exit_restart@ha 1284 addi r11,r11,exc_exit_restart@l 1285 cmplw r12,r11 |
| 1286#ifdef CONFIG_PPC_BOOK3S_601 1287 bltlr 1288#else |
|
| 1277 blt 3f | 1289 blt 3f |
| 1290#endif |
|
| 1278 lis r10,ee_restarts@ha 1279 lwz r12,ee_restarts@l(r10) 1280 addi r12,r12,1 1281 stw r12,ee_restarts@l(r10) 1282 mr r12,r11 /* restart at exc_exit_restart */ 1283 blr 12843: /* OK, we can't recover, kill this process */ 1285 /* but the 601 doesn't implement the RI bit, so assume it's OK */ | 1291 lis r10,ee_restarts@ha 1292 lwz r12,ee_restarts@l(r10) 1293 addi r12,r12,1 1294 stw r12,ee_restarts@l(r10) 1295 mr r12,r11 /* restart at exc_exit_restart */ 1296 blr 12973: /* OK, we can't recover, kill this process */ 1298 /* but the 601 doesn't implement the RI bit, so assume it's OK */ |
| 1286BEGIN_FTR_SECTION 1287 blr 1288END_FTR_SECTION_IFSET(CPU_FTR_601) | |
| 1289 lwz r3,_TRAP(r1) 1290 andi. r0,r3,1 1291 beq 5f 1292 SAVE_NVGPRS(r1) 1293 rlwinm r3,r3,0,0,30 1294 stw r3,_TRAP(r1) 12955: mfspr r2,SPRN_SPRG_THREAD 1296 addi r2,r2,-THREAD --- 27 unchanged lines hidden (view full) --- 1324 lis r6,1f@ha /* physical return address for rtas */ 1325 addi r6,r6,1f@l 1326 tophys(r6,r6) 1327 tophys(r7,r1) 1328 lwz r8,RTASENTRY(r4) 1329 lwz r4,RTASBASE(r4) 1330 mfmsr r9 1331 stw r9,8(r1) | 1299 lwz r3,_TRAP(r1) 1300 andi. r0,r3,1 1301 beq 5f 1302 SAVE_NVGPRS(r1) 1303 rlwinm r3,r3,0,0,30 1304 stw r3,_TRAP(r1) 13055: mfspr r2,SPRN_SPRG_THREAD 1306 addi r2,r2,-THREAD --- 27 unchanged lines hidden (view full) --- 1334 lis r6,1f@ha /* physical return address for rtas */ 1335 addi r6,r6,1f@l 1336 tophys(r6,r6) 1337 tophys(r7,r1) 1338 lwz r8,RTASENTRY(r4) 1339 lwz r4,RTASBASE(r4) 1340 mfmsr r9 1341 stw r9,8(r1) |
| 1332 LOAD_MSR_KERNEL(r0,MSR_KERNEL) | 1342 LOAD_REG_IMMEDIATE(r0,MSR_KERNEL) |
| 1333 SYNC /* disable interrupts so SRR0/1 */ 1334 MTMSRD(r0) /* don't get trashed */ 1335 li r9,MSR_KERNEL & ~(MSR_IR|MSR_DR) 1336 mtlr r6 1337 stw r7, THREAD + RTAS_SP(r2) 1338 mtspr SPRN_SRR0,r8 1339 mtspr SPRN_SRR1,r9 1340 RFI --- 17 unchanged lines hidden --- | 1343 SYNC /* disable interrupts so SRR0/1 */ 1344 MTMSRD(r0) /* don't get trashed */ 1345 li r9,MSR_KERNEL & ~(MSR_IR|MSR_DR) 1346 mtlr r6 1347 stw r7, THREAD + RTAS_SP(r2) 1348 mtspr SPRN_SRR0,r8 1349 mtspr SPRN_SRR1,r9 1350 RFI --- 17 unchanged lines hidden --- |