yosemite.dts (96916090f488986a4ebb8e9ffa6a3b50881d5ccd) | yosemite.dts (71f349799b34c8b6ce3df42126b4de6cfa16456d) |
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1/* 2 * Device Tree Source for AMCC Yosemite 3 * 4 * Copyright 2008 IBM Corp. 5 * Josh Boyer <jwboyer@linux.vnet.ibm.com> 6 * 7 * This file is licensed under the terms of the GNU General Public 8 * License version 2. This program is licensed "as is" without 9 * any warranty of any kind, whether express or implied. 10 */ 11 | 1/* 2 * Device Tree Source for AMCC Yosemite 3 * 4 * Copyright 2008 IBM Corp. 5 * Josh Boyer <jwboyer@linux.vnet.ibm.com> 6 * 7 * This file is licensed under the terms of the GNU General Public 8 * License version 2. This program is licensed "as is" without 9 * any warranty of any kind, whether express or implied. 10 */ 11 |
12/dts-v1/; 13 |
|
12/ { 13 #address-cells = <2>; 14 #size-cells = <1>; 15 model = "amcc,yosemite"; 16 compatible = "amcc,yosemite","amcc,bamboo"; | 14/ { 15 #address-cells = <2>; 16 #size-cells = <1>; 17 model = "amcc,yosemite"; 18 compatible = "amcc,yosemite","amcc,bamboo"; |
17 dcr-parent = <&/cpus/cpu@0>; | 19 dcr-parent = <&{/cpus/cpu@0}>; |
18 19 aliases { 20 ethernet0 = &EMAC0; 21 ethernet1 = &EMAC1; 22 serial0 = &UART0; 23 serial1 = &UART1; 24 serial2 = &UART2; 25 serial3 = &UART3; 26 }; 27 28 cpus { 29 #address-cells = <1>; 30 #size-cells = <0>; 31 32 cpu@0 { 33 device_type = "cpu"; 34 model = "PowerPC,440EP"; | 20 21 aliases { 22 ethernet0 = &EMAC0; 23 ethernet1 = &EMAC1; 24 serial0 = &UART0; 25 serial1 = &UART1; 26 serial2 = &UART2; 27 serial3 = &UART3; 28 }; 29 30 cpus { 31 #address-cells = <1>; 32 #size-cells = <0>; 33 34 cpu@0 { 35 device_type = "cpu"; 36 model = "PowerPC,440EP"; |
35 reg = <0>; | 37 reg = <0x00000000>; |
36 clock-frequency = <0>; /* Filled in by zImage */ 37 timebase-frequency = <0>; /* Filled in by zImage */ | 38 clock-frequency = <0>; /* Filled in by zImage */ 39 timebase-frequency = <0>; /* Filled in by zImage */ |
38 i-cache-line-size = <20>; 39 d-cache-line-size = <20>; 40 i-cache-size = <8000>; 41 d-cache-size = <8000>; | 40 i-cache-line-size = <32>; 41 d-cache-line-size = <32>; 42 i-cache-size = <32768>; 43 d-cache-size = <32768>; |
42 dcr-controller; 43 dcr-access-method = "native"; 44 }; 45 }; 46 47 memory { 48 device_type = "memory"; | 44 dcr-controller; 45 dcr-access-method = "native"; 46 }; 47 }; 48 49 memory { 50 device_type = "memory"; |
49 reg = <0 0 0>; /* Filled in by zImage */ | 51 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ |
50 }; 51 52 UIC0: interrupt-controller0 { 53 compatible = "ibm,uic-440ep","ibm,uic"; 54 interrupt-controller; 55 cell-index = <0>; | 52 }; 53 54 UIC0: interrupt-controller0 { 55 compatible = "ibm,uic-440ep","ibm,uic"; 56 interrupt-controller; 57 cell-index = <0>; |
56 dcr-reg = <0c0 009>; | 58 dcr-reg = <0x0c0 0x009>; |
57 #address-cells = <0>; 58 #size-cells = <0>; 59 #interrupt-cells = <2>; 60 }; 61 62 UIC1: interrupt-controller1 { 63 compatible = "ibm,uic-440ep","ibm,uic"; 64 interrupt-controller; 65 cell-index = <1>; | 59 #address-cells = <0>; 60 #size-cells = <0>; 61 #interrupt-cells = <2>; 62 }; 63 64 UIC1: interrupt-controller1 { 65 compatible = "ibm,uic-440ep","ibm,uic"; 66 interrupt-controller; 67 cell-index = <1>; |
66 dcr-reg = <0d0 009>; | 68 dcr-reg = <0x0d0 0x009>; |
67 #address-cells = <0>; 68 #size-cells = <0>; 69 #interrupt-cells = <2>; | 69 #address-cells = <0>; 70 #size-cells = <0>; 71 #interrupt-cells = <2>; |
70 interrupts = <1e 4 1f 4>; /* cascade */ | 72 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
71 interrupt-parent = <&UIC0>; 72 }; 73 74 SDR0: sdr { 75 compatible = "ibm,sdr-440ep"; | 73 interrupt-parent = <&UIC0>; 74 }; 75 76 SDR0: sdr { 77 compatible = "ibm,sdr-440ep"; |
76 dcr-reg = <00e 002>; | 78 dcr-reg = <0x00e 0x002>; |
77 }; 78 79 CPR0: cpr { 80 compatible = "ibm,cpr-440ep"; | 79 }; 80 81 CPR0: cpr { 82 compatible = "ibm,cpr-440ep"; |
81 dcr-reg = <00c 002>; | 83 dcr-reg = <0x00c 0x002>; |
82 }; 83 84 plb { 85 compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; 86 #address-cells = <2>; 87 #size-cells = <1>; 88 ranges; 89 clock-frequency = <0>; /* Filled in by zImage */ 90 91 SDRAM0: sdram { 92 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; | 84 }; 85 86 plb { 87 compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; 88 #address-cells = <2>; 89 #size-cells = <1>; 90 ranges; 91 clock-frequency = <0>; /* Filled in by zImage */ 92 93 SDRAM0: sdram { 94 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; |
93 dcr-reg = <010 2>; | 95 dcr-reg = <0x010 0x002>; |
94 }; 95 96 DMA0: dma { 97 compatible = "ibm,dma-440ep", "ibm,dma-440gp"; | 96 }; 97 98 DMA0: dma { 99 compatible = "ibm,dma-440ep", "ibm,dma-440gp"; |
98 dcr-reg = <100 027>; | 100 dcr-reg = <0x100 0x027>; |
99 }; 100 101 MAL0: mcmal { 102 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; | 101 }; 102 103 MAL0: mcmal { 104 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; |
103 dcr-reg = <180 62>; | 105 dcr-reg = <0x180 0x062>; |
104 num-tx-chans = <4>; 105 num-rx-chans = <2>; 106 interrupt-parent = <&MAL0>; | 106 num-tx-chans = <4>; 107 num-rx-chans = <2>; 108 interrupt-parent = <&MAL0>; |
107 interrupts = <0 1 2 3 4>; | 109 interrupts = <0x0 0x1 0x2 0x3 0x4>; |
108 #interrupt-cells = <1>; 109 #address-cells = <0>; 110 #size-cells = <0>; | 110 #interrupt-cells = <1>; 111 #address-cells = <0>; 112 #size-cells = <0>; |
111 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 112 /*RXEOB*/ 1 &UIC0 b 4 113 /*SERR*/ 2 &UIC1 0 4 114 /*TXDE*/ 3 &UIC1 1 4 115 /*RXDE*/ 4 &UIC1 2 4>; | 113 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 114 /*RXEOB*/ 0x1 &UIC0 0xb 0x4 115 /*SERR*/ 0x2 &UIC1 0x0 0x4 116 /*TXDE*/ 0x3 &UIC1 0x1 0x4 117 /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
116 }; 117 118 POB0: opb { 119 compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; 120 #address-cells = <1>; 121 #size-cells = <1>; 122 /* Bamboo is oddball in the 44x world and doesn't use the ERPN 123 * bits. 124 */ | 118 }; 119 120 POB0: opb { 121 compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; 122 #address-cells = <1>; 123 #size-cells = <1>; 124 /* Bamboo is oddball in the 44x world and doesn't use the ERPN 125 * bits. 126 */ |
125 ranges = <00000000 0 00000000 80000000 126 80000000 0 80000000 80000000>; | 127 ranges = <0x00000000 0x00000000 0x00000000 0x80000000 128 0x80000000 0x00000000 0x80000000 0x80000000>; |
127 interrupt-parent = <&UIC1>; | 129 interrupt-parent = <&UIC1>; |
128 interrupts = <7 4>; | 130 interrupts = <0x7 0x4>; |
129 clock-frequency = <0>; /* Filled in by zImage */ 130 131 EBC0: ebc { 132 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; | 131 clock-frequency = <0>; /* Filled in by zImage */ 132 133 EBC0: ebc { 134 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; |
133 dcr-reg = <012 2>; | 135 dcr-reg = <0x012 0x002>; |
134 #address-cells = <2>; 135 #size-cells = <1>; 136 clock-frequency = <0>; /* Filled in by zImage */ | 136 #address-cells = <2>; 137 #size-cells = <1>; 138 clock-frequency = <0>; /* Filled in by zImage */ |
137 interrupts = <5 1>; | 139 interrupts = <0x5 0x1>; |
138 interrupt-parent = <&UIC1>; 139 }; 140 141 UART0: serial@ef600300 { 142 device_type = "serial"; 143 compatible = "ns16550"; | 140 interrupt-parent = <&UIC1>; 141 }; 142 143 UART0: serial@ef600300 { 144 device_type = "serial"; 145 compatible = "ns16550"; |
144 reg = <ef600300 8>; 145 virtual-reg = <ef600300>; | 146 reg = <0xef600300 0x00000008>; 147 virtual-reg = <0xef600300>; |
146 clock-frequency = <0>; /* Filled in by zImage */ | 148 clock-frequency = <0>; /* Filled in by zImage */ |
147 current-speed = <1c200>; | 149 current-speed = <115200>; |
148 interrupt-parent = <&UIC0>; | 150 interrupt-parent = <&UIC0>; |
149 interrupts = <0 4>; | 151 interrupts = <0x0 0x4>; |
150 }; 151 152 UART1: serial@ef600400 { 153 device_type = "serial"; 154 compatible = "ns16550"; | 152 }; 153 154 UART1: serial@ef600400 { 155 device_type = "serial"; 156 compatible = "ns16550"; |
155 reg = <ef600400 8>; 156 virtual-reg = <ef600400>; | 157 reg = <0xef600400 0x00000008>; 158 virtual-reg = <0xef600400>; |
157 clock-frequency = <0>; 158 current-speed = <0>; 159 interrupt-parent = <&UIC0>; | 159 clock-frequency = <0>; 160 current-speed = <0>; 161 interrupt-parent = <&UIC0>; |
160 interrupts = <1 4>; | 162 interrupts = <0x1 0x4>; |
161 }; 162 163 UART2: serial@ef600500 { 164 device_type = "serial"; 165 compatible = "ns16550"; | 163 }; 164 165 UART2: serial@ef600500 { 166 device_type = "serial"; 167 compatible = "ns16550"; |
166 reg = <ef600500 8>; 167 virtual-reg = <ef600500>; | 168 reg = <0xef600500 0x00000008>; 169 virtual-reg = <0xef600500>; |
168 clock-frequency = <0>; 169 current-speed = <0>; 170 interrupt-parent = <&UIC0>; | 170 clock-frequency = <0>; 171 current-speed = <0>; 172 interrupt-parent = <&UIC0>; |
171 interrupts = <3 4>; | 173 interrupts = <0x3 0x4>; |
172 status = "disabled"; 173 }; 174 175 UART3: serial@ef600600 { 176 device_type = "serial"; 177 compatible = "ns16550"; | 174 status = "disabled"; 175 }; 176 177 UART3: serial@ef600600 { 178 device_type = "serial"; 179 compatible = "ns16550"; |
178 reg = <ef600600 8>; 179 virtual-reg = <ef600600>; | 180 reg = <0xef600600 0x00000008>; 181 virtual-reg = <0xef600600>; |
180 clock-frequency = <0>; 181 current-speed = <0>; 182 interrupt-parent = <&UIC0>; | 182 clock-frequency = <0>; 183 current-speed = <0>; 184 interrupt-parent = <&UIC0>; |
183 interrupts = <4 4>; | 185 interrupts = <0x4 0x4>; |
184 status = "disabled"; 185 }; 186 187 IIC0: i2c@ef600700 { 188 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | 186 status = "disabled"; 187 }; 188 189 IIC0: i2c@ef600700 { 190 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; |
189 reg = <ef600700 14>; | 191 reg = <0xef600700 0x00000014>; |
190 interrupt-parent = <&UIC0>; | 192 interrupt-parent = <&UIC0>; |
191 interrupts = <2 4>; | 193 interrupts = <0x2 0x4>; |
192 }; 193 194 IIC1: i2c@ef600800 { 195 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | 194 }; 195 196 IIC1: i2c@ef600800 { 197 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; |
196 reg = <ef600800 14>; | 198 reg = <0xef600800 0x00000014>; |
197 interrupt-parent = <&UIC0>; | 199 interrupt-parent = <&UIC0>; |
198 interrupts = <7 4>; | 200 interrupts = <0x7 0x4>; |
199 }; 200 201 spi@ef600900 { 202 compatible = "amcc,spi-440ep"; | 201 }; 202 203 spi@ef600900 { 204 compatible = "amcc,spi-440ep"; |
203 reg = <ef600900 6>; 204 interrupts = <8 4>; | 205 reg = <0xef600900 0x00000006>; 206 interrupts = <0x8 0x4>; |
205 interrupt-parent = <&UIC0>; 206 }; 207 208 ZMII0: emac-zmii@ef600d00 { 209 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; | 207 interrupt-parent = <&UIC0>; 208 }; 209 210 ZMII0: emac-zmii@ef600d00 { 211 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; |
210 reg = <ef600d00 c>; | 212 reg = <0xef600d00 0x0000000c>; |
211 }; 212 213 EMAC0: ethernet@ef600e00 { 214 device_type = "network"; 215 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 216 interrupt-parent = <&UIC1>; | 213 }; 214 215 EMAC0: ethernet@ef600e00 { 216 device_type = "network"; 217 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 218 interrupt-parent = <&UIC1>; |
217 interrupts = <1c 4 1d 4>; 218 reg = <ef600e00 70>; | 219 interrupts = <0x1c 0x4 0x1d 0x4>; 220 reg = <0xef600e00 0x00000070>; |
219 local-mac-address = [000000000000]; 220 mal-device = <&MAL0>; 221 mal-tx-channel = <0 1>; 222 mal-rx-channel = <0>; 223 cell-index = <0>; | 221 local-mac-address = [000000000000]; 222 mal-device = <&MAL0>; 223 mal-tx-channel = <0 1>; 224 mal-rx-channel = <0>; 225 cell-index = <0>; |
224 max-frame-size = <5dc>; 225 rx-fifo-size = <1000>; 226 tx-fifo-size = <800>; | 226 max-frame-size = <1500>; 227 rx-fifo-size = <4096>; 228 tx-fifo-size = <2048>; |
227 phy-mode = "rmii"; | 229 phy-mode = "rmii"; |
228 phy-map = <00000000>; | 230 phy-map = <0x00000000>; |
229 zmii-device = <&ZMII0>; 230 zmii-channel = <0>; 231 }; 232 233 EMAC1: ethernet@ef600f00 { 234 device_type = "network"; 235 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 236 interrupt-parent = <&UIC1>; | 231 zmii-device = <&ZMII0>; 232 zmii-channel = <0>; 233 }; 234 235 EMAC1: ethernet@ef600f00 { 236 device_type = "network"; 237 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 238 interrupt-parent = <&UIC1>; |
237 interrupts = <1e 4 1f 4>; 238 reg = <ef600f00 70>; | 239 interrupts = <0x1e 0x4 0x1f 0x4>; 240 reg = <0xef600f00 0x00000070>; |
239 local-mac-address = [000000000000]; 240 mal-device = <&MAL0>; 241 mal-tx-channel = <2 3>; 242 mal-rx-channel = <1>; 243 cell-index = <1>; | 241 local-mac-address = [000000000000]; 242 mal-device = <&MAL0>; 243 mal-tx-channel = <2 3>; 244 mal-rx-channel = <1>; 245 cell-index = <1>; |
244 max-frame-size = <5dc>; 245 rx-fifo-size = <1000>; 246 tx-fifo-size = <800>; | 246 max-frame-size = <1500>; 247 rx-fifo-size = <4096>; 248 tx-fifo-size = <2048>; |
247 phy-mode = "rmii"; | 249 phy-mode = "rmii"; |
248 phy-map = <00000000>; | 250 phy-map = <0x00000000>; |
249 zmii-device = <&ZMII0>; 250 zmii-channel = <1>; 251 }; 252 253 usb@ef601000 { 254 compatible = "ohci-be"; | 251 zmii-device = <&ZMII0>; 252 zmii-channel = <1>; 253 }; 254 255 usb@ef601000 { 256 compatible = "ohci-be"; |
255 reg = <ef601000 80>; 256 interrupts = <8 4 9 4>; | 257 reg = <0xef601000 0x00000080>; 258 interrupts = <0x8 0x4 0x9 0x4>; |
257 interrupt-parent = < &UIC1 >; 258 }; 259 }; 260 261 PCI0: pci@ec000000 { 262 device_type = "pci"; 263 #interrupt-cells = <1>; 264 #size-cells = <2>; 265 #address-cells = <3>; 266 compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; 267 primary; | 259 interrupt-parent = < &UIC1 >; 260 }; 261 }; 262 263 PCI0: pci@ec000000 { 264 device_type = "pci"; 265 #interrupt-cells = <1>; 266 #size-cells = <2>; 267 #address-cells = <3>; 268 compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; 269 primary; |
268 reg = <0 eec00000 8 /* Config space access */ 269 0 eed00000 4 /* IACK */ 270 0 eed00000 4 /* Special cycle */ 271 0 ef400000 40>; /* Internal registers */ | 270 reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */ 271 0x00000000 0xeed00000 0x00000004 /* IACK */ 272 0x00000000 0xeed00000 0x00000004 /* Special cycle */ 273 0x00000000 0xef400000 0x00000040>; /* Internal registers */ |
272 273 /* Outbound ranges, one memory and one IO, 274 * later cannot be changed. Chip supports a second 275 * IO range but we don't use it for now 276 */ | 274 275 /* Outbound ranges, one memory and one IO, 276 * later cannot be changed. Chip supports a second 277 * IO range but we don't use it for now 278 */ |
277 ranges = <02000000 0 a0000000 0 a0000000 0 20000000 278 01000000 0 00000000 0 e8000000 0 00010000>; | 279 ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000 280 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; |
279 280 /* Inbound 2GB range starting at 0 */ | 281 282 /* Inbound 2GB range starting at 0 */ |
281 dma-ranges = <42000000 0 0 0 0 0 80000000>; | 283 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
282 283 /* Bamboo has all 4 IRQ pins tied together per slot */ | 284 285 /* Bamboo has all 4 IRQ pins tied together per slot */ |
284 interrupt-map-mask = <f800 0 0 0>; | 286 interrupt-map-mask = <0xf800 0x0 0x0 0x0>; |
285 interrupt-map = < 286 /* IDSEL 1 */ | 287 interrupt-map = < 288 /* IDSEL 1 */ |
287 0800 0 0 0 &UIC0 1c 8 | 289 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8 |
288 289 /* IDSEL 2 */ | 290 291 /* IDSEL 2 */ |
290 1000 0 0 0 &UIC0 1b 8 | 292 0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8 |
291 292 /* IDSEL 3 */ | 293 294 /* IDSEL 3 */ |
293 1800 0 0 0 &UIC0 1a 8 | 295 0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8 |
294 295 /* IDSEL 4 */ | 296 297 /* IDSEL 4 */ |
296 2000 0 0 0 &UIC0 19 8 | 298 0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8 |
297 >; 298 }; 299 }; 300 301 chosen { 302 linux,stdout-path = "/plb/opb/serial@ef600300"; 303 }; 304}; | 299 >; 300 }; 301 }; 302 303 chosen { 304 linux,stdout-path = "/plb/opb/serial@ef600300"; 305 }; 306}; |