warp.dts (96916090f488986a4ebb8e9ffa6a3b50881d5ccd) warp.dts (71f349799b34c8b6ce3df42126b4de6cfa16456d)
1/*
2 * Device Tree Source for PIKA Warp
3 *
4 * Copyright (c) 2008 PIKA Technologies
5 * Sean MacLennan <smaclennan@pikatech.com>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without
9 * any warranty of any kind, whether express or implied.
10 */
11
1/*
2 * Device Tree Source for PIKA Warp
3 *
4 * Copyright (c) 2008 PIKA Technologies
5 * Sean MacLennan <smaclennan@pikatech.com>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without
9 * any warranty of any kind, whether express or implied.
10 */
11
12/dts-v1/;
13
12/ {
13 #address-cells = <2>;
14 #size-cells = <1>;
15 model = "pika,warp";
16 compatible = "pika,warp";
14/ {
15 #address-cells = <2>;
16 #size-cells = <1>;
17 model = "pika,warp";
18 compatible = "pika,warp";
17 dcr-parent = <&/cpus/cpu@0>;
19 dcr-parent = <&{/cpus/cpu@0}>;
18
19 aliases {
20 ethernet0 = &EMAC0;
21 serial0 = &UART0;
22 };
23
24 cpus {
25 #address-cells = <1>;
26 #size-cells = <0>;
27
28 cpu@0 {
29 device_type = "cpu";
30 model = "PowerPC,440EP";
20
21 aliases {
22 ethernet0 = &EMAC0;
23 serial0 = &UART0;
24 };
25
26 cpus {
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 cpu@0 {
31 device_type = "cpu";
32 model = "PowerPC,440EP";
31 reg = <0>;
33 reg = <0x00000000>;
32 clock-frequency = <0>; /* Filled in by zImage */
33 timebase-frequency = <0>; /* Filled in by zImage */
34 clock-frequency = <0>; /* Filled in by zImage */
35 timebase-frequency = <0>; /* Filled in by zImage */
34 i-cache-line-size = <20>;
35 d-cache-line-size = <20>;
36 i-cache-size = <8000>;
37 d-cache-size = <8000>;
36 i-cache-line-size = <32>;
37 d-cache-line-size = <32>;
38 i-cache-size = <32768>;
39 d-cache-size = <32768>;
38 dcr-controller;
39 dcr-access-method = "native";
40 };
41 };
42
43 memory {
44 device_type = "memory";
40 dcr-controller;
41 dcr-access-method = "native";
42 };
43 };
44
45 memory {
46 device_type = "memory";
45 reg = <0 0 0>; /* Filled in by zImage */
47 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
46 };
47
48 UIC0: interrupt-controller0 {
49 compatible = "ibm,uic-440ep","ibm,uic";
50 interrupt-controller;
51 cell-index = <0>;
48 };
49
50 UIC0: interrupt-controller0 {
51 compatible = "ibm,uic-440ep","ibm,uic";
52 interrupt-controller;
53 cell-index = <0>;
52 dcr-reg = <0c0 009>;
54 dcr-reg = <0x0c0 0x009>;
53 #address-cells = <0>;
54 #size-cells = <0>;
55 #interrupt-cells = <2>;
56 };
57
58 UIC1: interrupt-controller1 {
59 compatible = "ibm,uic-440ep","ibm,uic";
60 interrupt-controller;
61 cell-index = <1>;
55 #address-cells = <0>;
56 #size-cells = <0>;
57 #interrupt-cells = <2>;
58 };
59
60 UIC1: interrupt-controller1 {
61 compatible = "ibm,uic-440ep","ibm,uic";
62 interrupt-controller;
63 cell-index = <1>;
62 dcr-reg = <0d0 009>;
64 dcr-reg = <0x0d0 0x009>;
63 #address-cells = <0>;
64 #size-cells = <0>;
65 #interrupt-cells = <2>;
65 #address-cells = <0>;
66 #size-cells = <0>;
67 #interrupt-cells = <2>;
66 interrupts = <1e 4 1f 4>; /* cascade */
68 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
67 interrupt-parent = <&UIC0>;
68 };
69
70 SDR0: sdr {
71 compatible = "ibm,sdr-440ep";
69 interrupt-parent = <&UIC0>;
70 };
71
72 SDR0: sdr {
73 compatible = "ibm,sdr-440ep";
72 dcr-reg = <00e 002>;
74 dcr-reg = <0x00e 0x002>;
73 };
74
75 CPR0: cpr {
76 compatible = "ibm,cpr-440ep";
75 };
76
77 CPR0: cpr {
78 compatible = "ibm,cpr-440ep";
77 dcr-reg = <00c 002>;
79 dcr-reg = <0x00c 0x002>;
78 };
79
80 plb {
81 compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
82 #address-cells = <2>;
83 #size-cells = <1>;
84 ranges;
85 clock-frequency = <0>; /* Filled in by zImage */
86
87 SDRAM0: sdram {
88 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
80 };
81
82 plb {
83 compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
84 #address-cells = <2>;
85 #size-cells = <1>;
86 ranges;
87 clock-frequency = <0>; /* Filled in by zImage */
88
89 SDRAM0: sdram {
90 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
89 dcr-reg = <010 2>;
91 dcr-reg = <0x010 0x002>;
90 };
91
92 DMA0: dma {
93 compatible = "ibm,dma-440ep", "ibm,dma-440gp";
92 };
93
94 DMA0: dma {
95 compatible = "ibm,dma-440ep", "ibm,dma-440gp";
94 dcr-reg = <100 027>;
96 dcr-reg = <0x100 0x027>;
95 };
96
97 MAL0: mcmal {
98 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
97 };
98
99 MAL0: mcmal {
100 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
99 dcr-reg = <180 62>;
101 dcr-reg = <0x180 0x062>;
100 num-tx-chans = <4>;
101 num-rx-chans = <2>;
102 interrupt-parent = <&MAL0>;
102 num-tx-chans = <4>;
103 num-rx-chans = <2>;
104 interrupt-parent = <&MAL0>;
103 interrupts = <0 1 2 3 4>;
105 interrupts = <0x0 0x1 0x2 0x3 0x4>;
104 #interrupt-cells = <1>;
105 #address-cells = <0>;
106 #size-cells = <0>;
106 #interrupt-cells = <1>;
107 #address-cells = <0>;
108 #size-cells = <0>;
107 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
108 /*RXEOB*/ 1 &UIC0 b 4
109 /*SERR*/ 2 &UIC1 0 4
110 /*TXDE*/ 3 &UIC1 1 4
111 /*RXDE*/ 4 &UIC1 2 4>;
109 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
110 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
111 /*SERR*/ 0x2 &UIC1 0x0 0x4
112 /*TXDE*/ 0x3 &UIC1 0x1 0x4
113 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
112 };
113
114 POB0: opb {
115 compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
116 #address-cells = <1>;
117 #size-cells = <1>;
114 };
115
116 POB0: opb {
117 compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
118 #address-cells = <1>;
119 #size-cells = <1>;
118 ranges = <00000000 0 00000000 80000000
119 80000000 0 80000000 80000000>;
120 ranges = <0x00000000 0x00000000 0x00000000 0x80000000
121 0x80000000 0x00000000 0x80000000 0x80000000>;
120 interrupt-parent = <&UIC1>;
122 interrupt-parent = <&UIC1>;
121 interrupts = <7 4>;
123 interrupts = <0x7 0x4>;
122 clock-frequency = <0>; /* Filled in by zImage */
123
124 EBC0: ebc {
125 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
124 clock-frequency = <0>; /* Filled in by zImage */
125
126 EBC0: ebc {
127 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
126 dcr-reg = <012 2>;
128 dcr-reg = <0x012 0x002>;
127 #address-cells = <2>;
128 #size-cells = <1>;
129 clock-frequency = <0>; /* Filled in by zImage */
129 #address-cells = <2>;
130 #size-cells = <1>;
131 clock-frequency = <0>; /* Filled in by zImage */
130 interrupts = <5 1>;
132 interrupts = <0x5 0x1>;
131 interrupt-parent = <&UIC1>;
132
133 fpga@2,0 {
134 compatible = "pika,fpga";
133 interrupt-parent = <&UIC1>;
134
135 fpga@2,0 {
136 compatible = "pika,fpga";
135 reg = <2 0 2200>;
136 interrupts = <18 8>;
137 reg = <0x00000002 0x00000000 0x00002200>;
138 interrupts = <0x18 0x8>;
137 interrupt-parent = <&UIC0>;
138 };
139
140 nor_flash@0,0 {
141 compatible = "amd,s29gl512n", "cfi-flash";
142 bank-width = <2>;
139 interrupt-parent = <&UIC0>;
140 };
141
142 nor_flash@0,0 {
143 compatible = "amd,s29gl512n", "cfi-flash";
144 bank-width = <2>;
143 reg = <0 0 4000000>;
145 reg = <0x00000000 0x00000000 0x04000000>;
144 #address-cells = <1>;
145 #size-cells = <1>;
146 partition@0 {
147 label = "kernel";
146 #address-cells = <1>;
147 #size-cells = <1>;
148 partition@0 {
149 label = "kernel";
148 reg = <0 180000>;
150 reg = <0x00000000 0x00180000>;
149 };
150 partition@180000 {
151 label = "root";
151 };
152 partition@180000 {
153 label = "root";
152 reg = <180000 3480000>;
154 reg = <0x00180000 0x03480000>;
153 };
154 partition@3600000 {
155 label = "user";
155 };
156 partition@3600000 {
157 label = "user";
156 reg = <3600000 900000>;
158 reg = <0x03600000 0x00900000>;
157 };
158 partition@3f00000 {
159 label = "fpga";
159 };
160 partition@3f00000 {
161 label = "fpga";
160 reg = <3f00000 40000>;
162 reg = <0x03f00000 0x00040000>;
161 };
162 partition@3f40000 {
163 label = "env";
163 };
164 partition@3f40000 {
165 label = "env";
164 reg = <3f40000 40000>;
166 reg = <0x03f40000 0x00040000>;
165 };
166 partition@3f80000 {
167 label = "u-boot";
167 };
168 partition@3f80000 {
169 label = "u-boot";
168 reg = <3f80000 80000>;
170 reg = <0x03f80000 0x00080000>;
169 };
170 };
171 };
172
173 UART0: serial@ef600300 {
174 device_type = "serial";
175 compatible = "ns16550";
171 };
172 };
173 };
174
175 UART0: serial@ef600300 {
176 device_type = "serial";
177 compatible = "ns16550";
176 reg = <ef600300 8>;
177 virtual-reg = <ef600300>;
178 reg = <0xef600300 0x00000008>;
179 virtual-reg = <0xef600300>;
178 clock-frequency = <0>; /* Filled in by zImage */
180 clock-frequency = <0>; /* Filled in by zImage */
179 current-speed = <1c200>;
181 current-speed = <115200>;
180 interrupt-parent = <&UIC0>;
182 interrupt-parent = <&UIC0>;
181 interrupts = <0 4>;
183 interrupts = <0x0 0x4>;
182 };
183
184 IIC0: i2c@ef600700 {
185 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
184 };
185
186 IIC0: i2c@ef600700 {
187 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
186 reg = <ef600700 14>;
188 reg = <0xef600700 0x00000014>;
187 interrupt-parent = <&UIC0>;
189 interrupt-parent = <&UIC0>;
188 interrupts = <2 4>;
190 interrupts = <0x2 0x4>;
189 };
190
191 GPIO0: gpio@ef600b00 {
192 compatible = "ibm,gpio-440ep";
191 };
192
193 GPIO0: gpio@ef600b00 {
194 compatible = "ibm,gpio-440ep";
193 reg = <ef600b00 48>;
195 reg = <0xef600b00 0x00000048>;
194 };
195
196 GPIO1: gpio@ef600c00 {
197 compatible = "ibm,gpio-440ep";
196 };
197
198 GPIO1: gpio@ef600c00 {
199 compatible = "ibm,gpio-440ep";
198 reg = <ef600c00 48>;
200 reg = <0xef600c00 0x00000048>;
199 };
200
201 ZMII0: emac-zmii@ef600d00 {
202 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
201 };
202
203 ZMII0: emac-zmii@ef600d00 {
204 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
203 reg = <ef600d00 c>;
205 reg = <0xef600d00 0x0000000c>;
204 };
205
206 EMAC0: ethernet@ef600e00 {
207 device_type = "network";
208 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
209 interrupt-parent = <&UIC1>;
206 };
207
208 EMAC0: ethernet@ef600e00 {
209 device_type = "network";
210 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
211 interrupt-parent = <&UIC1>;
210 interrupts = <1c 4 1d 4>;
211 reg = <ef600e00 70>;
212 interrupts = <0x1c 0x4 0x1d 0x4>;
213 reg = <0xef600e00 0x00000070>;
212 local-mac-address = [000000000000];
213 mal-device = <&MAL0>;
214 mal-tx-channel = <0 1>;
215 mal-rx-channel = <0>;
216 cell-index = <0>;
214 local-mac-address = [000000000000];
215 mal-device = <&MAL0>;
216 mal-tx-channel = <0 1>;
217 mal-rx-channel = <0>;
218 cell-index = <0>;
217 max-frame-size = <5dc>;
218 rx-fifo-size = <1000>;
219 tx-fifo-size = <800>;
219 max-frame-size = <1500>;
220 rx-fifo-size = <4096>;
221 tx-fifo-size = <2048>;
220 phy-mode = "rmii";
222 phy-mode = "rmii";
221 phy-map = <00000000>;
223 phy-map = <0x00000000>;
222 zmii-device = <&ZMII0>;
223 zmii-channel = <0>;
224 };
225
226 usb@ef601000 {
227 compatible = "ohci-be";
224 zmii-device = <&ZMII0>;
225 zmii-channel = <0>;
226 };
227
228 usb@ef601000 {
229 compatible = "ohci-be";
228 reg = <ef601000 80>;
229 interrupts = <8 1 9 1>;
230 reg = <0xef601000 0x00000080>;
231 interrupts = <0x8 0x1 0x9 0x1>;
230 interrupt-parent = < &UIC1 >;
231 };
232 };
233 };
234
235 chosen {
236 linux,stdout-path = "/plb/opb/serial@ef600300";
237 };
238};
232 interrupt-parent = < &UIC1 >;
233 };
234 };
235 };
236
237 chosen {
238 linux,stdout-path = "/plb/opb/serial@ef600300";
239 };
240};