tqm8548.dts (22ae77bc7ac115b9d518d5cbc13d39317079b2b0) tqm8548.dts (6467cae318ba8adaab37a82e8dd8af60ca9ed6e4)
1/*
2 * TQM8548 Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 * Copyright 2008 Wolfgang Grandegger <wg@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the

--- 71 unchanged lines hidden (view full) ---

80 #size-cells = <0>;
81 cell-index = <0>;
82 compatible = "fsl-i2c";
83 reg = <0x3000 0x100>;
84 interrupts = <43 2>;
85 interrupt-parent = <&mpic>;
86 dfsrr;
87
1/*
2 * TQM8548 Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 * Copyright 2008 Wolfgang Grandegger <wg@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the

--- 71 unchanged lines hidden (view full) ---

80 #size-cells = <0>;
81 cell-index = <0>;
82 compatible = "fsl-i2c";
83 reg = <0x3000 0x100>;
84 interrupts = <43 2>;
85 interrupt-parent = <&mpic>;
86 dfsrr;
87
88 dtt@50 {
88 dtt@48 {
89 compatible = "national,lm75";
89 compatible = "national,lm75";
90 reg = <0x50>;
90 reg = <0x48>;
91 };
92
93 rtc@68 {
94 compatible = "dallas,ds1337";
95 reg = <0x68>;
96 };
97 };
98

--- 293 unchanged lines hidden (view full) ---

392 interrupts = <4 1>;
393 interrupt-parent = <&mpic>;
394 };
395
396 /* Note: NAND support needs to be enabled in U-Boot */
397 upm@3,0 {
398 #address-cells = <0>;
399 #size-cells = <0>;
91 };
92
93 rtc@68 {
94 compatible = "dallas,ds1337";
95 reg = <0x68>;
96 };
97 };
98

--- 293 unchanged lines hidden (view full) ---

392 interrupts = <4 1>;
393 interrupt-parent = <&mpic>;
394 };
395
396 /* Note: NAND support needs to be enabled in U-Boot */
397 upm@3,0 {
398 #address-cells = <0>;
399 #size-cells = <0>;
400 compatible = "tqc,tqm8548-upm-nand", "fsl,upm-nand";
400 compatible = "fsl,upm-nand";
401 reg = <3 0x0 0x800>;
402 fsl,upm-addr-offset = <0x10>;
403 fsl,upm-cmd-offset = <0x08>;
401 reg = <3 0x0 0x800>;
402 fsl,upm-addr-offset = <0x10>;
403 fsl,upm-cmd-offset = <0x08>;
404 /* Micron MT29F8G08FAB multi-chip device */
405 fsl,upm-addr-line-cs-offsets = <0x0 0x200>;
406 fsl,upm-wait-flags = <0x5>;
407 chip-delay = <25>; // in micro-seconds
408
409 nand@0 {
410 #address-cells = <1>;
411 #size-cells = <1>;
412
413 partition@0 {
414 label = "fs";
404 chip-delay = <25>; // in micro-seconds
405
406 nand@0 {
407 #address-cells = <1>;
408 #size-cells = <1>;
409
410 partition@0 {
411 label = "fs";
415 reg = <0x00000000 0x10000000>;
412 reg = <0x00000000 0x01000000>;
416 };
417 };
418 };
419 };
420
421 pci0: pci@e0008000 {
422 cell-index = <0>;
423 #interrupt-cells = <1>;

--- 53 unchanged lines hidden --- 		413 };
414 };
415 };
416 };
417
418 pci0: pci@e0008000 {
419 cell-index = <0>;
420 #interrupt-cells = <1>;

--- 53 unchanged lines hidden ---