tqm8540.dts (28eac2b74cc7136dee3f2615167811d24d25bc97) tqm8540.dts (e1a228973646bfa09575423cf5c40b3d0f40d670)
1/*
2 * TQM 8540 Device Tree Source
3 *
4 * Copyright 2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your

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53 #address-cells = <1>;
54 #size-cells = <1>;
55 device_type = "soc";
56 ranges = <0x0 0xe0000000 0x100000>;
57 reg = <0xe0000000 0x200>;
58 bus-frequency = <0>;
59 compatible = "fsl,mpc8540-immr", "simple-bus";
60
1/*
2 * TQM 8540 Device Tree Source
3 *
4 * Copyright 2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your

--- 44 unchanged lines hidden (view full) ---

53 #address-cells = <1>;
54 #size-cells = <1>;
55 device_type = "soc";
56 ranges = <0x0 0xe0000000 0x100000>;
57 reg = <0xe0000000 0x200>;
58 bus-frequency = <0>;
59 compatible = "fsl,mpc8540-immr", "simple-bus";
60
61 ecm-law@0 {
62 compatible = "fsl,ecm-law";
63 reg = <0x0 0x1000>;
64 fsl,num-laws = <8>;
65 };
66
67 ecm@1000 {
68 compatible = "fsl,mpc8540-ecm", "fsl,ecm";
69 reg = <0x1000 0x1000>;
70 interrupts = <17 2>;
71 interrupt-parent = <&mpic>;
72 };
73
61 memory-controller@2000 {
62 compatible = "fsl,mpc8540-memory-controller";
63 reg = <0x2000 0x1000>;
64 interrupt-parent = <&mpic>;
65 interrupts = <18 2>;
66 };
67
68 L2: l2-cache-controller@20000 {

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74 memory-controller@2000 {
75 compatible = "fsl,mpc8540-memory-controller";
76 reg = <0x2000 0x1000>;
77 interrupt-parent = <&mpic>;
78 interrupts = <18 2>;
79 };
80
81 L2: l2-cache-controller@20000 {

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