socrates.dts (28eac2b74cc7136dee3f2615167811d24d25bc97) socrates.dts (e1a228973646bfa09575423cf5c40b3d0f40d670)
1/*
2 * Device Tree Source for the Socrates board (MPC8544).
3 *
4 * Copyright (c) 2008 Emcraft Systems.
5 * Sergei Poselenov, <sposelenov@emcraft.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the

--- 45 unchanged lines hidden (view full) ---

54 #size-cells = <1>;
55 device_type = "soc";
56
57 ranges = <0x00000000 0xe0000000 0x00100000>;
58 reg = <0xe0000000 0x00001000>; // CCSRBAR 1M
59 bus-frequency = <0>; // Filled in by U-Boot
60 compatible = "fsl,mpc8544-immr", "simple-bus";
61
1/*
2 * Device Tree Source for the Socrates board (MPC8544).
3 *
4 * Copyright (c) 2008 Emcraft Systems.
5 * Sergei Poselenov, <sposelenov@emcraft.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the

--- 45 unchanged lines hidden (view full) ---

54 #size-cells = <1>;
55 device_type = "soc";
56
57 ranges = <0x00000000 0xe0000000 0x00100000>;
58 reg = <0xe0000000 0x00001000>; // CCSRBAR 1M
59 bus-frequency = <0>; // Filled in by U-Boot
60 compatible = "fsl,mpc8544-immr", "simple-bus";
61
62 ecm-law@0 {
63 compatible = "fsl,ecm-law";
64 reg = <0x0 0x1000>;
65 fsl,num-laws = <10>;
66 };
67
68 ecm@1000 {
69 compatible = "fsl,mpc8544-ecm", "fsl,ecm";
70 reg = <0x1000 0x1000>;
71 interrupts = <17 2>;
72 interrupt-parent = <&mpic>;
73 };
74
62 memory-controller@2000 {
63 compatible = "fsl,mpc8544-memory-controller";
64 reg = <0x2000 0x1000>;
65 interrupt-parent = <&mpic>;
66 interrupts = <18 2>;
67 };
68
69 L2: l2-cache-controller@20000 {

--- 269 unchanged lines hidden --- 		75 memory-controller@2000 {
76 compatible = "fsl,mpc8544-memory-controller";
77 reg = <0x2000 0x1000>;
78 interrupt-parent = <&mpic>;
79 interrupts = <18 2>;
80 };
81
82 L2: l2-cache-controller@20000 {

--- 269 unchanged lines hidden ---