sequoia.dts (2d4b3f37ded8998a362c8d0b4be02f583dd9a002) sequoia.dts (71f349799b34c8b6ce3df42126b4de6cfa16456d)
1/*
2 * Device Tree Source for AMCC Sequoia
3 *
4 * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
5 * Copyright (c) 2006, 2007 IBM Corp.
6 *
7 * FIXME: Draft only!
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without
11 * any warranty of any kind, whether express or implied.
12 *
13 */
14
1/*
2 * Device Tree Source for AMCC Sequoia
3 *
4 * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
5 * Copyright (c) 2006, 2007 IBM Corp.
6 *
7 * FIXME: Draft only!
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without
11 * any warranty of any kind, whether express or implied.
12 *
13 */
14
15/dts-v1/;
16
15/ {
16 #address-cells = <2>;
17 #size-cells = <1>;
18 model = "amcc,sequoia";
19 compatible = "amcc,sequoia";
17/ {
18 #address-cells = <2>;
19 #size-cells = <1>;
20 model = "amcc,sequoia";
21 compatible = "amcc,sequoia";
20 dcr-parent = <&/cpus/cpu@0>;
22 dcr-parent = <&{/cpus/cpu@0}>;
21
22 aliases {
23 ethernet0 = &EMAC0;
24 ethernet1 = &EMAC1;
25 serial0 = &UART0;
26 serial1 = &UART1;
27 serial2 = &UART2;
28 serial3 = &UART3;
29 };
30
31 cpus {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 cpu@0 {
36 device_type = "cpu";
37 model = "PowerPC,440EPx";
23
24 aliases {
25 ethernet0 = &EMAC0;
26 ethernet1 = &EMAC1;
27 serial0 = &UART0;
28 serial1 = &UART1;
29 serial2 = &UART2;
30 serial3 = &UART3;
31 };
32
33 cpus {
34 #address-cells = <1>;
35 #size-cells = <0>;
36
37 cpu@0 {
38 device_type = "cpu";
39 model = "PowerPC,440EPx";
38 reg = <0>;
40 reg = <0x00000000>;
39 clock-frequency = <0>; /* Filled in by zImage */
40 timebase-frequency = <0>; /* Filled in by zImage */
41 clock-frequency = <0>; /* Filled in by zImage */
42 timebase-frequency = <0>; /* Filled in by zImage */
41 i-cache-line-size = <20>;
42 d-cache-line-size = <20>;
43 i-cache-size = <8000>;
44 d-cache-size = <8000>;
43 i-cache-line-size = <32>;
44 d-cache-line-size = <32>;
45 i-cache-size = <32768>;
46 d-cache-size = <32768>;
45 dcr-controller;
46 dcr-access-method = "native";
47 };
48 };
49
50 memory {
51 device_type = "memory";
47 dcr-controller;
48 dcr-access-method = "native";
49 };
50 };
51
52 memory {
53 device_type = "memory";
52 reg = <0 0 0>; /* Filled in by zImage */
54 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
53 };
54
55 UIC0: interrupt-controller0 {
56 compatible = "ibm,uic-440epx","ibm,uic";
57 interrupt-controller;
58 cell-index = <0>;
55 };
56
57 UIC0: interrupt-controller0 {
58 compatible = "ibm,uic-440epx","ibm,uic";
59 interrupt-controller;
60 cell-index = <0>;
59 dcr-reg = <0c0 009>;
61 dcr-reg = <0x0c0 0x009>;
60 #address-cells = <0>;
61 #size-cells = <0>;
62 #interrupt-cells = <2>;
63 };
64
65 UIC1: interrupt-controller1 {
66 compatible = "ibm,uic-440epx","ibm,uic";
67 interrupt-controller;
68 cell-index = <1>;
62 #address-cells = <0>;
63 #size-cells = <0>;
64 #interrupt-cells = <2>;
65 };
66
67 UIC1: interrupt-controller1 {
68 compatible = "ibm,uic-440epx","ibm,uic";
69 interrupt-controller;
70 cell-index = <1>;
69 dcr-reg = <0d0 009>;
71 dcr-reg = <0x0d0 0x009>;
70 #address-cells = <0>;
71 #size-cells = <0>;
72 #interrupt-cells = <2>;
72 #address-cells = <0>;
73 #size-cells = <0>;
74 #interrupt-cells = <2>;
73 interrupts = <1e 4 1f 4>; /* cascade */
75 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
74 interrupt-parent = <&UIC0>;
75 };
76
77 UIC2: interrupt-controller2 {
78 compatible = "ibm,uic-440epx","ibm,uic";
79 interrupt-controller;
80 cell-index = <2>;
76 interrupt-parent = <&UIC0>;
77 };
78
79 UIC2: interrupt-controller2 {
80 compatible = "ibm,uic-440epx","ibm,uic";
81 interrupt-controller;
82 cell-index = <2>;
81 dcr-reg = <0e0 009>;
83 dcr-reg = <0x0e0 0x009>;
82 #address-cells = <0>;
83 #size-cells = <0>;
84 #interrupt-cells = <2>;
84 #address-cells = <0>;
85 #size-cells = <0>;
86 #interrupt-cells = <2>;
85 interrupts = <1c 4 1d 4>; /* cascade */
87 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
86 interrupt-parent = <&UIC0>;
87 };
88
89 SDR0: sdr {
90 compatible = "ibm,sdr-440epx", "ibm,sdr-440ep";
88 interrupt-parent = <&UIC0>;
89 };
90
91 SDR0: sdr {
92 compatible = "ibm,sdr-440epx", "ibm,sdr-440ep";
91 dcr-reg = <00e 002>;
93 dcr-reg = <0x00e 0x002>;
92 };
93
94 CPR0: cpr {
95 compatible = "ibm,cpr-440epx", "ibm,cpr-440ep";
94 };
95
96 CPR0: cpr {
97 compatible = "ibm,cpr-440epx", "ibm,cpr-440ep";
96 dcr-reg = <00c 002>;
98 dcr-reg = <0x00c 0x002>;
97 };
98
99 plb {
100 compatible = "ibm,plb-440epx", "ibm,plb4";
101 #address-cells = <2>;
102 #size-cells = <1>;
103 ranges;
104 clock-frequency = <0>; /* Filled in by zImage */
105
106 SDRAM0: sdram {
107 compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali";
99 };
100
101 plb {
102 compatible = "ibm,plb-440epx", "ibm,plb4";
103 #address-cells = <2>;
104 #size-cells = <1>;
105 ranges;
106 clock-frequency = <0>; /* Filled in by zImage */
107
108 SDRAM0: sdram {
109 compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali";
108 dcr-reg = <010 2>;
110 dcr-reg = <0x010 0x002>;
109 };
110
111 DMA0: dma {
112 compatible = "ibm,dma-440epx", "ibm,dma-4xx";
111 };
112
113 DMA0: dma {
114 compatible = "ibm,dma-440epx", "ibm,dma-4xx";
113 dcr-reg = <100 027>;
115 dcr-reg = <0x100 0x027>;
114 };
115
116 MAL0: mcmal {
117 compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
116 };
117
118 MAL0: mcmal {
119 compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
118 dcr-reg = <180 62>;
120 dcr-reg = <0x180 0x062>;
119 num-tx-chans = <2>;
120 num-rx-chans = <2>;
121 interrupt-parent = <&MAL0>;
121 num-tx-chans = <2>;
122 num-rx-chans = <2>;
123 interrupt-parent = <&MAL0>;
122 interrupts = <0 1 2 3 4>;
124 interrupts = <0x0 0x1 0x2 0x3 0x4>;
123 #interrupt-cells = <1>;
124 #address-cells = <0>;
125 #size-cells = <0>;
125 #interrupt-cells = <1>;
126 #address-cells = <0>;
127 #size-cells = <0>;
126 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
127 /*RXEOB*/ 1 &UIC0 b 4
128 /*SERR*/ 2 &UIC1 0 4
129 /*TXDE*/ 3 &UIC1 1 4
130 /*RXDE*/ 4 &UIC1 2 4>;
131 interrupt-map-mask = <ffffffff>;
128 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
129 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
130 /*SERR*/ 0x2 &UIC1 0x0 0x4
131 /*TXDE*/ 0x3 &UIC1 0x1 0x4
132 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
133 interrupt-map-mask = <0xffffffff>;
132 };
133
134 USB1: usb@e0000400 {
135 compatible = "ohci-be";
134 };
135
136 USB1: usb@e0000400 {
137 compatible = "ohci-be";
136 reg = <0 e0000400 60>;
138 reg = <0x00000000 0xe0000400 0x00000060>;
137 interrupt-parent = <&UIC0>;
139 interrupt-parent = <&UIC0>;
138 interrupts = <15 8>;
140 interrupts = <0x15 0x8>;
139 };
140
141 USB0: ehci@e0000300 {
142 compatible = "ibm,usb-ehci-440epx", "usb-ehci";
143 interrupt-parent = <&UIC0>;
141 };
142
143 USB0: ehci@e0000300 {
144 compatible = "ibm,usb-ehci-440epx", "usb-ehci";
145 interrupt-parent = <&UIC0>;
144 interrupts = <1a 4>;
145 reg = <0 e0000300 90 0 e0000390 70>;
146 interrupts = <0x1a 0x4>;
147 reg = <0x00000000 0xe0000300 0x00000090 0x00000000 0xe0000390 0x00000070>;
146 big-endian;
147 };
148
149 POB0: opb {
150 compatible = "ibm,opb-440epx", "ibm,opb";
151 #address-cells = <1>;
152 #size-cells = <1>;
148 big-endian;
149 };
150
151 POB0: opb {
152 compatible = "ibm,opb-440epx", "ibm,opb";
153 #address-cells = <1>;
154 #size-cells = <1>;
153 ranges = <00000000 1 00000000 80000000
154 80000000 1 80000000 80000000>;
155 ranges = <0x00000000 0x00000001 0x00000000 0x80000000
156 0x80000000 0x00000001 0x80000000 0x80000000>;
155 interrupt-parent = <&UIC1>;
157 interrupt-parent = <&UIC1>;
156 interrupts = <7 4>;
158 interrupts = <0x7 0x4>;
157 clock-frequency = <0>; /* Filled in by zImage */
158
159 EBC0: ebc {
160 compatible = "ibm,ebc-440epx", "ibm,ebc";
159 clock-frequency = <0>; /* Filled in by zImage */
160
161 EBC0: ebc {
162 compatible = "ibm,ebc-440epx", "ibm,ebc";
161 dcr-reg = <012 2>;
163 dcr-reg = <0x012 0x002>;
162 #address-cells = <2>;
163 #size-cells = <1>;
164 clock-frequency = <0>; /* Filled in by zImage */
164 #address-cells = <2>;
165 #size-cells = <1>;
166 clock-frequency = <0>; /* Filled in by zImage */
165 interrupts = <5 1>;
167 interrupts = <0x5 0x1>;
166 interrupt-parent = <&UIC1>;
167
168 nor_flash@0,0 {
169 compatible = "amd,s29gl256n", "cfi-flash";
170 bank-width = <2>;
168 interrupt-parent = <&UIC1>;
169
170 nor_flash@0,0 {
171 compatible = "amd,s29gl256n", "cfi-flash";
172 bank-width = <2>;
171 reg = <0 000000 4000000>;
173 reg = <0x00000000 0x00000000 0x04000000>;
172 #address-cells = <1>;
173 #size-cells = <1>;
174 partition@0 {
175 label = "Kernel";
174 #address-cells = <1>;
175 #size-cells = <1>;
176 partition@0 {
177 label = "Kernel";
176 reg = <0 180000>;
178 reg = <0x00000000 0x00180000>;
177 };
178 partition@180000 {
179 label = "ramdisk";
179 };
180 partition@180000 {
181 label = "ramdisk";
180 reg = <180000 200000>;
182 reg = <0x00180000 0x00200000>;
181 };
182 partition@380000 {
183 label = "file system";
183 };
184 partition@380000 {
185 label = "file system";
184 reg = <380000 3aa0000>;
186 reg = <0x00380000 0x03aa0000>;
185 };
186 partition@3e20000 {
187 label = "kozio";
187 };
188 partition@3e20000 {
189 label = "kozio";
188 reg = <3e20000 140000>;
190 reg = <0x03e20000 0x00140000>;
189 };
190 partition@3f60000 {
191 label = "env";
191 };
192 partition@3f60000 {
193 label = "env";
192 reg = <3f60000 40000>;
194 reg = <0x03f60000 0x00040000>;
193 };
194 partition@3fa0000 {
195 label = "u-boot";
195 };
196 partition@3fa0000 {
197 label = "u-boot";
196 reg = <3fa0000 60000>;
198 reg = <0x03fa0000 0x00060000>;
197 };
198 };
199
200 };
201
202 UART0: serial@ef600300 {
203 device_type = "serial";
204 compatible = "ns16550";
199 };
200 };
201
202 };
203
204 UART0: serial@ef600300 {
205 device_type = "serial";
206 compatible = "ns16550";
205 reg = <ef600300 8>;
206 virtual-reg = <ef600300>;
207 reg = <0xef600300 0x00000008>;
208 virtual-reg = <0xef600300>;
207 clock-frequency = <0>; /* Filled in by zImage */
209 clock-frequency = <0>; /* Filled in by zImage */
208 current-speed = <1c200>;
210 current-speed = <115200>;
209 interrupt-parent = <&UIC0>;
211 interrupt-parent = <&UIC0>;
210 interrupts = <0 4>;
212 interrupts = <0x0 0x4>;
211 };
212
213 UART1: serial@ef600400 {
214 device_type = "serial";
215 compatible = "ns16550";
213 };
214
215 UART1: serial@ef600400 {
216 device_type = "serial";
217 compatible = "ns16550";
216 reg = <ef600400 8>;
217 virtual-reg = <ef600400>;
218 reg = <0xef600400 0x00000008>;
219 virtual-reg = <0xef600400>;
218 clock-frequency = <0>;
219 current-speed = <0>;
220 interrupt-parent = <&UIC0>;
220 clock-frequency = <0>;
221 current-speed = <0>;
222 interrupt-parent = <&UIC0>;
221 interrupts = <1 4>;
223 interrupts = <0x1 0x4>;
222 };
223
224 UART2: serial@ef600500 {
225 device_type = "serial";
226 compatible = "ns16550";
224 };
225
226 UART2: serial@ef600500 {
227 device_type = "serial";
228 compatible = "ns16550";
227 reg = <ef600500 8>;
228 virtual-reg = <ef600500>;
229 reg = <0xef600500 0x00000008>;
230 virtual-reg = <0xef600500>;
229 clock-frequency = <0>;
230 current-speed = <0>;
231 interrupt-parent = <&UIC1>;
231 clock-frequency = <0>;
232 current-speed = <0>;
233 interrupt-parent = <&UIC1>;
232 interrupts = <3 4>;
234 interrupts = <0x3 0x4>;
233 };
234
235 UART3: serial@ef600600 {
236 device_type = "serial";
237 compatible = "ns16550";
235 };
236
237 UART3: serial@ef600600 {
238 device_type = "serial";
239 compatible = "ns16550";
238 reg = <ef600600 8>;
239 virtual-reg = <ef600600>;
240 reg = <0xef600600 0x00000008>;
241 virtual-reg = <0xef600600>;
240 clock-frequency = <0>;
241 current-speed = <0>;
242 interrupt-parent = <&UIC1>;
242 clock-frequency = <0>;
243 current-speed = <0>;
244 interrupt-parent = <&UIC1>;
243 interrupts = <4 4>;
245 interrupts = <0x4 0x4>;
244 };
245
246 IIC0: i2c@ef600700 {
247 compatible = "ibm,iic-440epx", "ibm,iic";
246 };
247
248 IIC0: i2c@ef600700 {
249 compatible = "ibm,iic-440epx", "ibm,iic";
248 reg = <ef600700 14>;
250 reg = <0xef600700 0x00000014>;
249 interrupt-parent = <&UIC0>;
251 interrupt-parent = <&UIC0>;
250 interrupts = <2 4>;
252 interrupts = <0x2 0x4>;
251 };
252
253 IIC1: i2c@ef600800 {
254 compatible = "ibm,iic-440epx", "ibm,iic";
253 };
254
255 IIC1: i2c@ef600800 {
256 compatible = "ibm,iic-440epx", "ibm,iic";
255 reg = <ef600800 14>;
257 reg = <0xef600800 0x00000014>;
256 interrupt-parent = <&UIC0>;
258 interrupt-parent = <&UIC0>;
257 interrupts = <7 4>;
259 interrupts = <0x7 0x4>;
258 };
259
260 ZMII0: emac-zmii@ef600d00 {
261 compatible = "ibm,zmii-440epx", "ibm,zmii";
260 };
261
262 ZMII0: emac-zmii@ef600d00 {
263 compatible = "ibm,zmii-440epx", "ibm,zmii";
262 reg = <ef600d00 c>;
264 reg = <0xef600d00 0x0000000c>;
263 };
264
265 RGMII0: emac-rgmii@ef601000 {
266 compatible = "ibm,rgmii-440epx", "ibm,rgmii";
265 };
266
267 RGMII0: emac-rgmii@ef601000 {
268 compatible = "ibm,rgmii-440epx", "ibm,rgmii";
267 reg = <ef601000 8>;
269 reg = <0xef601000 0x00000008>;
268 has-mdio;
269 };
270
271 EMAC0: ethernet@ef600e00 {
272 device_type = "network";
273 compatible = "ibm,emac-440epx", "ibm,emac4";
274 interrupt-parent = <&EMAC0>;
270 has-mdio;
271 };
272
273 EMAC0: ethernet@ef600e00 {
274 device_type = "network";
275 compatible = "ibm,emac-440epx", "ibm,emac4";
276 interrupt-parent = <&EMAC0>;
275 interrupts = <0 1>;
277 interrupts = <0x0 0x1>;
276 #interrupt-cells = <1>;
277 #address-cells = <0>;
278 #size-cells = <0>;
278 #interrupt-cells = <1>;
279 #address-cells = <0>;
280 #size-cells = <0>;
279 interrupt-map = </*Status*/ 0 &UIC0 18 4
280 /*Wake*/ 1 &UIC1 1d 4>;
281 reg = <ef600e00 70>;
281 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
282 /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
283 reg = <0xef600e00 0x00000070>;
282 local-mac-address = [000000000000];
283 mal-device = <&MAL0>;
284 mal-tx-channel = <0>;
285 mal-rx-channel = <0>;
286 cell-index = <0>;
284 local-mac-address = [000000000000];
285 mal-device = <&MAL0>;
286 mal-tx-channel = <0>;
287 mal-rx-channel = <0>;
288 cell-index = <0>;
287 max-frame-size = <2328>;
288 rx-fifo-size = <1000>;
289 tx-fifo-size = <800>;
289 max-frame-size = <9000>;
290 rx-fifo-size = <4096>;
291 tx-fifo-size = <2048>;
290 phy-mode = "rgmii";
292 phy-mode = "rgmii";
291 phy-map = <00000000>;
293 phy-map = <0x00000000>;
292 zmii-device = <&ZMII0>;
293 zmii-channel = <0>;
294 rgmii-device = <&RGMII0>;
295 rgmii-channel = <0>;
296 has-inverted-stacr-oc;
297 has-new-stacr-staopc;
298 };
299
300 EMAC1: ethernet@ef600f00 {
301 device_type = "network";
302 compatible = "ibm,emac-440epx", "ibm,emac4";
303 interrupt-parent = <&EMAC1>;
294 zmii-device = <&ZMII0>;
295 zmii-channel = <0>;
296 rgmii-device = <&RGMII0>;
297 rgmii-channel = <0>;
298 has-inverted-stacr-oc;
299 has-new-stacr-staopc;
300 };
301
302 EMAC1: ethernet@ef600f00 {
303 device_type = "network";
304 compatible = "ibm,emac-440epx", "ibm,emac4";
305 interrupt-parent = <&EMAC1>;
304 interrupts = <0 1>;
306 interrupts = <0x0 0x1>;
305 #interrupt-cells = <1>;
306 #address-cells = <0>;
307 #size-cells = <0>;
307 #interrupt-cells = <1>;
308 #address-cells = <0>;
309 #size-cells = <0>;
308 interrupt-map = </*Status*/ 0 &UIC0 19 4
309 /*Wake*/ 1 &UIC1 1f 4>;
310 reg = <ef600f00 70>;
310 interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
311 /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
312 reg = <0xef600f00 0x00000070>;
311 local-mac-address = [000000000000];
312 mal-device = <&MAL0>;
313 mal-tx-channel = <1>;
314 mal-rx-channel = <1>;
315 cell-index = <1>;
313 local-mac-address = [000000000000];
314 mal-device = <&MAL0>;
315 mal-tx-channel = <1>;
316 mal-rx-channel = <1>;
317 cell-index = <1>;
316 max-frame-size = <2328>;
317 rx-fifo-size = <1000>;
318 tx-fifo-size = <800>;
318 max-frame-size = <9000>;
319 rx-fifo-size = <4096>;
320 tx-fifo-size = <2048>;
319 phy-mode = "rgmii";
321 phy-mode = "rgmii";
320 phy-map = <00000000>;
322 phy-map = <0x00000000>;
321 zmii-device = <&ZMII0>;
322 zmii-channel = <1>;
323 rgmii-device = <&RGMII0>;
324 rgmii-channel = <1>;
325 has-inverted-stacr-oc;
326 has-new-stacr-staopc;
327 };
328 };
329
330 PCI0: pci@1ec000000 {
331 device_type = "pci";
332 #interrupt-cells = <1>;
333 #size-cells = <2>;
334 #address-cells = <3>;
335 compatible = "ibm,plb440epx-pci", "ibm,plb-pci";
336 primary;
323 zmii-device = <&ZMII0>;
324 zmii-channel = <1>;
325 rgmii-device = <&RGMII0>;
326 rgmii-channel = <1>;
327 has-inverted-stacr-oc;
328 has-new-stacr-staopc;
329 };
330 };
331
332 PCI0: pci@1ec000000 {
333 device_type = "pci";
334 #interrupt-cells = <1>;
335 #size-cells = <2>;
336 #address-cells = <3>;
337 compatible = "ibm,plb440epx-pci", "ibm,plb-pci";
338 primary;
337 reg = <1 eec00000 8 /* Config space access */
338 1 eed00000 4 /* IACK */
339 1 eed00000 4 /* Special cycle */
340 1 ef400000 40>; /* Internal registers */
339 reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */
340 0x00000001 0xeed00000 0x00000004 /* IACK */
341 0x00000001 0xeed00000 0x00000004 /* Special cycle */
342 0x00000001 0xef400000 0x00000040>; /* Internal registers */
341
342 /* Outbound ranges, one memory and one IO,
343 * later cannot be changed. Chip supports a second
344 * IO range but we don't use it for now
345 * From the 440EPx user manual:
346 * PCI 1 Memory 1 8000 0000 1 BFFF FFFF 1GB
347 * I/O 1 E800 0000 1 E800 FFFF 64KB
348 * I/O 1 E880 0000 1 EBFF FFFF 56MB
349 */
343
344 /* Outbound ranges, one memory and one IO,
345 * later cannot be changed. Chip supports a second
346 * IO range but we don't use it for now
347 * From the 440EPx user manual:
348 * PCI 1 Memory 1 8000 0000 1 BFFF FFFF 1GB
349 * I/O 1 E800 0000 1 E800 FFFF 64KB
350 * I/O 1 E880 0000 1 EBFF FFFF 56MB
351 */
350 ranges = <02000000 0 80000000 1 80000000 0 40000000
351 01000000 0 00000000 1 e8000000 0 00010000
352 01000000 0 00000000 1 e8800000 0 03800000>;
352 ranges = <0x02000000 0x00000000 0x80000000 0x00000001 0x80000000 0x00000000 0x40000000
353 0x01000000 0x00000000 0x00000000 0x00000001 0xe8000000 0x00000000 0x00010000
354 0x01000000 0x00000000 0x00000000 0x00000001 0xe8800000 0x00000000 0x03800000>;
353
354 /* Inbound 2GB range starting at 0 */
355
356 /* Inbound 2GB range starting at 0 */
355 dma-ranges = <42000000 0 0 0 0 0 80000000>;
357 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
356
357 /* All PCI interrupts are routed to IRQ 67 */
358
359 /* All PCI interrupts are routed to IRQ 67 */
358 interrupt-map-mask = <0000 0 0 0>;
359 interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
360 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
361 interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >;
360 };
361 };
362
363 chosen {
364 linux,stdout-path = "/plb/opb/serial@ef600300";
365 bootargs = "console=ttyS0,115200";
366 };
367};
362 };
363 };
364
365 chosen {
366 linux,stdout-path = "/plb/opb/serial@ef600300";
367 bootargs = "console=ttyS0,115200";
368 };
369};