ksi8560.dts (7bee946358c3cb957d4aa648fc5ab3cad0b232d0) ksi8560.dts (fe671772ab1bf5624f2c4dbe2295e6ebeb8055fc)
1/*
2 * Device Tree Source for Emerson KSI8560
3 *
4 * Author: Alexandr Smirnov <asmirnov@ru.mvista.com>
5 *
6 * Based on mpc8560ads.dts
7 *
8 * 2008 (c) MontaVista, Software, Inc. This file is licensed under

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52 soc@fdf00000 {
53 #address-cells = <1>;
54 #size-cells = <1>;
55 device_type = "soc";
56 ranges = <0x00000000 0xfdf00000 0x00100000>;
57 bus-frequency = <0>; /* Fixed by bootwrapper */
58
59 memory-controller@2000 {
1/*
2 * Device Tree Source for Emerson KSI8560
3 *
4 * Author: Alexandr Smirnov <asmirnov@ru.mvista.com>
5 *
6 * Based on mpc8560ads.dts
7 *
8 * 2008 (c) MontaVista, Software, Inc. This file is licensed under

--- 43 unchanged lines hidden (view full) ---

52 soc@fdf00000 {
53 #address-cells = <1>;
54 #size-cells = <1>;
55 device_type = "soc";
56 ranges = <0x00000000 0xfdf00000 0x00100000>;
57 bus-frequency = <0>; /* Fixed by bootwrapper */
58
59 memory-controller@2000 {
60 compatible = "fsl,8540-memory-controller";
60 compatible = "fsl,mpc8540-memory-controller";
61 reg = <0x2000 0x1000>;
62 interrupt-parent = <&mpic>;
63 interrupts = <0x12 0x2>;
64 };
65
66 L2: l2-cache-controller@20000 {
61 reg = <0x2000 0x1000>;
62 interrupt-parent = <&mpic>;
63 interrupts = <0x12 0x2>;
64 };
65
66 L2: l2-cache-controller@20000 {
67 compatible = "fsl,8540-l2-cache-controller";
67 compatible = "fsl,mpc8540-l2-cache-controller";
68 reg = <0x20000 0x1000>;
69 cache-line-size = <0x20>; /* 32 bytes */
70 cache-size = <0x40000>; /* L2, 256K */
71 interrupt-parent = <&mpic>;
72 interrupts = <0x10 0x2>;
73 };
74
75 i2c@3000 {

--- 259 unchanged lines hidden --- 		68 reg = <0x20000 0x1000>;
69 cache-line-size = <0x20>; /* 32 bytes */
70 cache-size = <0x40000>; /* L2, 256K */
71 interrupt-parent = <&mpic>;
72 interrupts = <0x10 0x2>;
73 };
74
75 i2c@3000 {

--- 259 unchanged lines hidden ---