| katmai.dts (c1144d29f405ce1f4e6ede6482beb3d0d09750c6) | katmai.dts (86bc917d2ac117ec922dbf8ed92ca989bf333281) |
|---|---|
| 1/* 2 * Device Tree Source for AMCC Katmai eval board 3 * 4 * Copyright (c) 2006, 2007 IBM Corp. 5 * Benjamin Herrenschmidt <benh@kernel.crashing.org> 6 * 7 * Copyright (c) 2006, 2007 IBM Corp. 8 * Josh Boyer <jwboyer@linux.vnet.ibm.com> --- 305 unchanged lines hidden (view full) --- 314 /* IDSEL 1 */ 315 0x800 0x0 0x0 0x1 &UIC1 0x14 0x8 316 0x800 0x0 0x0 0x2 &UIC1 0x13 0x8 317 0x800 0x0 0x0 0x3 &UIC1 0x12 0x8 318 0x800 0x0 0x0 0x4 &UIC1 0x11 0x8 319 >; 320 }; 321 | 1/* 2 * Device Tree Source for AMCC Katmai eval board 3 * 4 * Copyright (c) 2006, 2007 IBM Corp. 5 * Benjamin Herrenschmidt <benh@kernel.crashing.org> 6 * 7 * Copyright (c) 2006, 2007 IBM Corp. 8 * Josh Boyer <jwboyer@linux.vnet.ibm.com> --- 305 unchanged lines hidden (view full) --- 314 /* IDSEL 1 */ 315 0x800 0x0 0x0 0x1 &UIC1 0x14 0x8 316 0x800 0x0 0x0 0x2 &UIC1 0x13 0x8 317 0x800 0x0 0x0 0x3 &UIC1 0x12 0x8 318 0x800 0x0 0x0 0x4 &UIC1 0x11 0x8 319 >; 320 }; 321 |
| 322 PCIE0: pciex@d00000000 { | 322 PCIE0: pcie@d00000000 { |
| 323 device_type = "pci"; 324 #interrupt-cells = <1>; 325 #size-cells = <2>; 326 #address-cells = <3>; 327 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; 328 primary; 329 port = <0x0>; /* port number */ 330 reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ --- 24 unchanged lines hidden (view full) --- 355 interrupt-map-mask = <0x0 0x0 0x0 0x7>; 356 interrupt-map = < 357 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ 358 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ 359 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ 360 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; 361 }; 362 | 323 device_type = "pci"; 324 #interrupt-cells = <1>; 325 #size-cells = <2>; 326 #address-cells = <3>; 327 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; 328 primary; 329 port = <0x0>; /* port number */ 330 reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ --- 24 unchanged lines hidden (view full) --- 355 interrupt-map-mask = <0x0 0x0 0x0 0x7>; 356 interrupt-map = < 357 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ 358 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ 359 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ 360 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; 361 }; 362 |
| 363 PCIE1: pciex@d20000000 { | 363 PCIE1: pcie@d20000000 { |
| 364 device_type = "pci"; 365 #interrupt-cells = <1>; 366 #size-cells = <2>; 367 #address-cells = <3>; 368 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; 369 primary; 370 port = <0x1>; /* port number */ 371 reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ --- 24 unchanged lines hidden (view full) --- 396 interrupt-map-mask = <0x0 0x0 0x0 0x7>; 397 interrupt-map = < 398 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ 399 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ 400 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ 401 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; 402 }; 403 | 364 device_type = "pci"; 365 #interrupt-cells = <1>; 366 #size-cells = <2>; 367 #address-cells = <3>; 368 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; 369 primary; 370 port = <0x1>; /* port number */ 371 reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ --- 24 unchanged lines hidden (view full) --- 396 interrupt-map-mask = <0x0 0x0 0x0 0x7>; 397 interrupt-map = < 398 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ 399 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ 400 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ 401 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; 402 }; 403 |
| 404 PCIE2: pciex@d40000000 { | 404 PCIE2: pcie@d40000000 { |
| 405 device_type = "pci"; 406 #interrupt-cells = <1>; 407 #size-cells = <2>; 408 #address-cells = <3>; 409 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; 410 primary; 411 port = <0x2>; /* port number */ 412 reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */ --- 98 unchanged lines hidden --- | 405 device_type = "pci"; 406 #interrupt-cells = <1>; 407 #size-cells = <2>; 408 #address-cells = <3>; 409 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; 410 primary; 411 port = <0x2>; /* port number */ 412 reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */ --- 98 unchanged lines hidden --- |