iss4xx-mpic.dts (c1144d29f405ce1f4e6ede6482beb3d0d09750c6) iss4xx-mpic.dts (5c285dd76c7f022dbde3f617efd4f0b8b8ebaeb7)
1/*
2 * Device Tree Source for IBM Embedded PPC 476 Platform
3 *
4 * Copyright 2010 Torez Smith, IBM Corporation.
5 *
6 * Based on earlier code:
7 * Copyright (c) 2006, 2007 IBM Corp.
8 * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>

--- 29 unchanged lines hidden (view full) ---

38 clock-frequency = <100000000>; // 100Mhz :-)
39 timebase-frequency = <100000000>;
40 i-cache-line-size = <32>;
41 d-cache-line-size = <32>;
42 i-cache-size = <32768>;
43 d-cache-size = <32768>;
44 dcr-controller;
45 dcr-access-method = "native";
1/*
2 * Device Tree Source for IBM Embedded PPC 476 Platform
3 *
4 * Copyright 2010 Torez Smith, IBM Corporation.
5 *
6 * Based on earlier code:
7 * Copyright (c) 2006, 2007 IBM Corp.
8 * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>

--- 29 unchanged lines hidden (view full) ---

38 clock-frequency = <100000000>; // 100Mhz :-)
39 timebase-frequency = <100000000>;
40 i-cache-line-size = <32>;
41 d-cache-line-size = <32>;
42 i-cache-size = <32768>;
43 d-cache-size = <32768>;
44 dcr-controller;
45 dcr-access-method = "native";
46 status = "ok";
46 status = "okay";
47 };
48 cpu@1 {
49 device_type = "cpu";
50 model = "PowerPC,4xx"; // real CPU changed in sim
51 reg = <1>;
52 clock-frequency = <100000000>; // 100Mhz :-)
53 timebase-frequency = <100000000>;
54 i-cache-line-size = <32>;

--- 101 unchanged lines hidden --- 		47 };
48 cpu@1 {
49 device_type = "cpu";
50 model = "PowerPC,4xx"; // real CPU changed in sim
51 reg = <1>;
52 clock-frequency = <100000000>; // 100Mhz :-)
53 timebase-frequency = <100000000>;
54 i-cache-line-size = <32>;

--- 101 unchanged lines hidden ---