glacier.dts (f26e8817b235d8764363bffcc9cbfc61867371f2) glacier.dts (86bc917d2ac117ec922dbf8ed92ca989bf333281)
1/*
2 * Device Tree Source for AMCC Glacier (460GT)
3 *
4 * Copyright 2008-2010 DENX Software Engineering, Stefan Roese <sr@denx.de>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.

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484 /* This drives busses 0 to 0x3f */
485 bus-range = <0x0 0x3f>;
486
487 /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */
488 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
489 interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >;
490 };
491
1/*
2 * Device Tree Source for AMCC Glacier (460GT)
3 *
4 * Copyright 2008-2010 DENX Software Engineering, Stefan Roese <sr@denx.de>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.

--- 475 unchanged lines hidden (view full) ---

484 /* This drives busses 0 to 0x3f */
485 bus-range = <0x0 0x3f>;
486
487 /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */
488 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
489 interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >;
490 };
491
492 PCIE0: pciex@d00000000 {
492 PCIE0: pcie@d00000000 {
493 device_type = "pci";
494 #interrupt-cells = <1>;
495 #size-cells = <2>;
496 #address-cells = <3>;
497 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
498 primary;
499 port = <0x0>; /* port number */
500 reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */

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526 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
527 interrupt-map = <
528 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */
529 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */
530 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
531 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
532 };
533
493 device_type = "pci";
494 #interrupt-cells = <1>;
495 #size-cells = <2>;
496 #address-cells = <3>;
497 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
498 primary;
499 port = <0x0>; /* port number */
500 reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */

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526 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
527 interrupt-map = <
528 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */
529 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */
530 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
531 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
532 };
533
534 PCIE1: pciex@d20000000 {
534 PCIE1: pcie@d20000000 {
535 device_type = "pci";
536 #interrupt-cells = <1>;
537 #size-cells = <2>;
538 #address-cells = <3>;
539 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
540 primary;
541 port = <0x1>; /* port number */
542 reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */

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535 device_type = "pci";
536 #interrupt-cells = <1>;
537 #size-cells = <2>;
538 #address-cells = <3>;
539 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
540 primary;
541 port = <0x1>; /* port number */
542 reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */

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