ebony.dts (96916090f488986a4ebb8e9ffa6a3b50881d5ccd) ebony.dts (71f349799b34c8b6ce3df42126b4de6cfa16456d)
1/*
2 * Device Tree Source for IBM Ebony
3 *
4 * Copyright (c) 2006, 2007 IBM Corp.
5 * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
6 *
7 * FIXME: Draft only!
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without
11 * any warranty of any kind, whether express or implied.
12 */
13
1/*
2 * Device Tree Source for IBM Ebony
3 *
4 * Copyright (c) 2006, 2007 IBM Corp.
5 * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
6 *
7 * FIXME: Draft only!
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without
11 * any warranty of any kind, whether express or implied.
12 */
13
14/dts-v1/;
15
14/ {
15 #address-cells = <2>;
16 #size-cells = <1>;
17 model = "ibm,ebony";
18 compatible = "ibm,ebony";
16/ {
17 #address-cells = <2>;
18 #size-cells = <1>;
19 model = "ibm,ebony";
20 compatible = "ibm,ebony";
19 dcr-parent = <&/cpus/cpu@0>;
21 dcr-parent = <&{/cpus/cpu@0}>;
20
21 aliases {
22 ethernet0 = &EMAC0;
23 ethernet1 = &EMAC1;
24 serial0 = &UART0;
25 serial1 = &UART1;
26 };
27
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 cpu@0 {
33 device_type = "cpu";
34 model = "PowerPC,440GP";
22
23 aliases {
24 ethernet0 = &EMAC0;
25 ethernet1 = &EMAC1;
26 serial0 = &UART0;
27 serial1 = &UART1;
28 };
29
30 cpus {
31 #address-cells = <1>;
32 #size-cells = <0>;
33
34 cpu@0 {
35 device_type = "cpu";
36 model = "PowerPC,440GP";
35 reg = <0>;
37 reg = <0x00000000>;
36 clock-frequency = <0>; // Filled in by zImage
37 timebase-frequency = <0>; // Filled in by zImage
38 clock-frequency = <0>; // Filled in by zImage
39 timebase-frequency = <0>; // Filled in by zImage
38 i-cache-line-size = <20>;
39 d-cache-line-size = <20>;
40 i-cache-size = <8000>; /* 32 kB */
41 d-cache-size = <8000>; /* 32 kB */
40 i-cache-line-size = <32>;
41 d-cache-line-size = <32>;
42 i-cache-size = <32768>; /* 32 kB */
43 d-cache-size = <32768>; /* 32 kB */
42 dcr-controller;
43 dcr-access-method = "native";
44 };
45 };
46
47 memory {
48 device_type = "memory";
44 dcr-controller;
45 dcr-access-method = "native";
46 };
47 };
48
49 memory {
50 device_type = "memory";
49 reg = <0 0 0>; // Filled in by zImage
51 reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
50 };
51
52 UIC0: interrupt-controller0 {
53 compatible = "ibm,uic-440gp", "ibm,uic";
54 interrupt-controller;
55 cell-index = <0>;
52 };
53
54 UIC0: interrupt-controller0 {
55 compatible = "ibm,uic-440gp", "ibm,uic";
56 interrupt-controller;
57 cell-index = <0>;
56 dcr-reg = <0c0 009>;
58 dcr-reg = <0x0c0 0x009>;
57 #address-cells = <0>;
58 #size-cells = <0>;
59 #interrupt-cells = <2>;
60
61 };
62
63 UIC1: interrupt-controller1 {
64 compatible = "ibm,uic-440gp", "ibm,uic";
65 interrupt-controller;
66 cell-index = <1>;
59 #address-cells = <0>;
60 #size-cells = <0>;
61 #interrupt-cells = <2>;
62
63 };
64
65 UIC1: interrupt-controller1 {
66 compatible = "ibm,uic-440gp", "ibm,uic";
67 interrupt-controller;
68 cell-index = <1>;
67 dcr-reg = <0d0 009>;
69 dcr-reg = <0x0d0 0x009>;
68 #address-cells = <0>;
69 #size-cells = <0>;
70 #interrupt-cells = <2>;
70 #address-cells = <0>;
71 #size-cells = <0>;
72 #interrupt-cells = <2>;
71 interrupts = <1e 4 1f 4>; /* cascade */
73 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
72 interrupt-parent = <&UIC0>;
73 };
74
75 CPC0: cpc {
76 compatible = "ibm,cpc-440gp";
74 interrupt-parent = <&UIC0>;
75 };
76
77 CPC0: cpc {
78 compatible = "ibm,cpc-440gp";
77 dcr-reg = <0b0 003 0e0 010>;
79 dcr-reg = <0x0b0 0x003 0x0e0 0x010>;
78 // FIXME: anything else?
79 };
80
81 plb {
82 compatible = "ibm,plb-440gp", "ibm,plb4";
83 #address-cells = <2>;
84 #size-cells = <1>;
85 ranges;
86 clock-frequency = <0>; // Filled in by zImage
87
88 SDRAM0: memory-controller {
89 compatible = "ibm,sdram-440gp";
80 // FIXME: anything else?
81 };
82
83 plb {
84 compatible = "ibm,plb-440gp", "ibm,plb4";
85 #address-cells = <2>;
86 #size-cells = <1>;
87 ranges;
88 clock-frequency = <0>; // Filled in by zImage
89
90 SDRAM0: memory-controller {
91 compatible = "ibm,sdram-440gp";
90 dcr-reg = <010 2>;
92 dcr-reg = <0x010 0x002>;
91 // FIXME: anything else?
92 };
93
94 SRAM0: sram {
95 compatible = "ibm,sram-440gp";
93 // FIXME: anything else?
94 };
95
96 SRAM0: sram {
97 compatible = "ibm,sram-440gp";
96 dcr-reg = <020 8 00a 1>;
98 dcr-reg = <0x020 0x008 0x00a 0x001>;
97 };
98
99 DMA0: dma {
100 // FIXME: ???
101 compatible = "ibm,dma-440gp";
99 };
100
101 DMA0: dma {
102 // FIXME: ???
103 compatible = "ibm,dma-440gp";
102 dcr-reg = <100 027>;
104 dcr-reg = <0x100 0x027>;
103 };
104
105 MAL0: mcmal {
106 compatible = "ibm,mcmal-440gp", "ibm,mcmal";
105 };
106
107 MAL0: mcmal {
108 compatible = "ibm,mcmal-440gp", "ibm,mcmal";
107 dcr-reg = <180 62>;
109 dcr-reg = <0x180 0x062>;
108 num-tx-chans = <4>;
109 num-rx-chans = <4>;
110 interrupt-parent = <&MAL0>;
110 num-tx-chans = <4>;
111 num-rx-chans = <4>;
112 interrupt-parent = <&MAL0>;
111 interrupts = <0 1 2 3 4>;
113 interrupts = <0x0 0x1 0x2 0x3 0x4>;
112 #interrupt-cells = <1>;
113 #address-cells = <0>;
114 #size-cells = <0>;
114 #interrupt-cells = <1>;
115 #address-cells = <0>;
116 #size-cells = <0>;
115 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
116 /*RXEOB*/ 1 &UIC0 b 4
117 /*SERR*/ 2 &UIC1 0 4
118 /*TXDE*/ 3 &UIC1 1 4
119 /*RXDE*/ 4 &UIC1 2 4>;
120 interrupt-map-mask = <ffffffff>;
117 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
118 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
119 /*SERR*/ 0x2 &UIC1 0x0 0x4
120 /*TXDE*/ 0x3 &UIC1 0x1 0x4
121 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
122 interrupt-map-mask = <0xffffffff>;
121 };
122
123 POB0: opb {
124 compatible = "ibm,opb-440gp", "ibm,opb";
125 #address-cells = <1>;
126 #size-cells = <1>;
127 /* Wish there was a nicer way of specifying a full 32-bit
128 range */
123 };
124
125 POB0: opb {
126 compatible = "ibm,opb-440gp", "ibm,opb";
127 #address-cells = <1>;
128 #size-cells = <1>;
129 /* Wish there was a nicer way of specifying a full 32-bit
130 range */
129 ranges = <00000000 1 00000000 80000000
130 80000000 1 80000000 80000000>;
131 dcr-reg = <090 00b>;
131 ranges = <0x00000000 0x00000001 0x00000000 0x80000000
132 0x80000000 0x00000001 0x80000000 0x80000000>;
133 dcr-reg = <0x090 0x00b>;
132 interrupt-parent = <&UIC1>;
134 interrupt-parent = <&UIC1>;
133 interrupts = <7 4>;
135 interrupts = <0x7 0x4>;
134 clock-frequency = <0>; // Filled in by zImage
135
136 EBC0: ebc {
137 compatible = "ibm,ebc-440gp", "ibm,ebc";
136 clock-frequency = <0>; // Filled in by zImage
137
138 EBC0: ebc {
139 compatible = "ibm,ebc-440gp", "ibm,ebc";
138 dcr-reg = <012 2>;
140 dcr-reg = <0x012 0x002>;
139 #address-cells = <2>;
140 #size-cells = <1>;
141 clock-frequency = <0>; // Filled in by zImage
142 // ranges property is supplied by zImage
143 // based on firmware's configuration of the
144 // EBC bridge
141 #address-cells = <2>;
142 #size-cells = <1>;
143 clock-frequency = <0>; // Filled in by zImage
144 // ranges property is supplied by zImage
145 // based on firmware's configuration of the
146 // EBC bridge
145 interrupts = <5 4>;
147 interrupts = <0x5 0x4>;
146 interrupt-parent = <&UIC1>;
147
148 small-flash@0,80000 {
149 compatible = "jedec-flash";
150 bank-width = <1>;
148 interrupt-parent = <&UIC1>;
149
150 small-flash@0,80000 {
151 compatible = "jedec-flash";
152 bank-width = <1>;
151 reg = <0 80000 80000>;
153 reg = <0x00000000 0x00080000 0x00080000>;
152 #address-cells = <1>;
153 #size-cells = <1>;
154 partition@0 {
155 label = "OpenBIOS";
154 #address-cells = <1>;
155 #size-cells = <1>;
156 partition@0 {
157 label = "OpenBIOS";
156 reg = <0 80000>;
158 reg = <0x00000000 0x00080000>;
157 read-only;
158 };
159 };
160
161 nvram@1,0 {
162 /* NVRAM & RTC */
163 compatible = "ds1743-nvram";
159 read-only;
160 };
161 };
162
163 nvram@1,0 {
164 /* NVRAM & RTC */
165 compatible = "ds1743-nvram";
164 #bytes = <2000>;
165 reg = <1 0 2000>;
166 #bytes = <0x2000>;
167 reg = <0x00000001 0x00000000 0x00002000>;
166 };
167
168 large-flash@2,0 {
169 compatible = "jedec-flash";
170 bank-width = <1>;
168 };
169
170 large-flash@2,0 {
171 compatible = "jedec-flash";
172 bank-width = <1>;
171 reg = <2 0 400000>;
173 reg = <0x00000002 0x00000000 0x00400000>;
172 #address-cells = <1>;
173 #size-cells = <1>;
174 partition@0 {
175 label = "fs";
174 #address-cells = <1>;
175 #size-cells = <1>;
176 partition@0 {
177 label = "fs";
176 reg = <0 380000>;
178 reg = <0x00000000 0x00380000>;
177 };
178 partition@380000 {
179 label = "firmware";
179 };
180 partition@380000 {
181 label = "firmware";
180 reg = <380000 80000>;
182 reg = <0x00380000 0x00080000>;
181 };
182 };
183
184 ir@3,0 {
183 };
184 };
185
186 ir@3,0 {
185 reg = <3 0 10>;
187 reg = <0x00000003 0x00000000 0x00000010>;
186 };
187
188 fpga@7,0 {
189 compatible = "Ebony-FPGA";
188 };
189
190 fpga@7,0 {
191 compatible = "Ebony-FPGA";
190 reg = <7 0 10>;
191 virtual-reg = <e8300000>;
192 reg = <0x00000007 0x00000000 0x00000010>;
193 virtual-reg = <0xe8300000>;
192 };
193 };
194
195 UART0: serial@40000200 {
196 device_type = "serial";
197 compatible = "ns16550";
194 };
195 };
196
197 UART0: serial@40000200 {
198 device_type = "serial";
199 compatible = "ns16550";
198 reg = <40000200 8>;
199 virtual-reg = <e0000200>;
200 clock-frequency = <A8C000>;
201 current-speed = <2580>;
200 reg = <0x40000200 0x00000008>;
201 virtual-reg = <0xe0000200>;
202 clock-frequency = <11059200>;
203 current-speed = <9600>;
202 interrupt-parent = <&UIC0>;
204 interrupt-parent = <&UIC0>;
203 interrupts = <0 4>;
205 interrupts = <0x0 0x4>;
204 };
205
206 UART1: serial@40000300 {
207 device_type = "serial";
208 compatible = "ns16550";
206 };
207
208 UART1: serial@40000300 {
209 device_type = "serial";
210 compatible = "ns16550";
209 reg = <40000300 8>;
210 virtual-reg = <e0000300>;
211 clock-frequency = <A8C000>;
212 current-speed = <2580>;
211 reg = <0x40000300 0x00000008>;
212 virtual-reg = <0xe0000300>;
213 clock-frequency = <11059200>;
214 current-speed = <9600>;
213 interrupt-parent = <&UIC0>;
215 interrupt-parent = <&UIC0>;
214 interrupts = <1 4>;
216 interrupts = <0x1 0x4>;
215 };
216
217 IIC0: i2c@40000400 {
218 /* FIXME */
219 compatible = "ibm,iic-440gp", "ibm,iic";
217 };
218
219 IIC0: i2c@40000400 {
220 /* FIXME */
221 compatible = "ibm,iic-440gp", "ibm,iic";
220 reg = <40000400 14>;
222 reg = <0x40000400 0x00000014>;
221 interrupt-parent = <&UIC0>;
223 interrupt-parent = <&UIC0>;
222 interrupts = <2 4>;
224 interrupts = <0x2 0x4>;
223 };
224 IIC1: i2c@40000500 {
225 /* FIXME */
226 compatible = "ibm,iic-440gp", "ibm,iic";
225 };
226 IIC1: i2c@40000500 {
227 /* FIXME */
228 compatible = "ibm,iic-440gp", "ibm,iic";
227 reg = <40000500 14>;
229 reg = <0x40000500 0x00000014>;
228 interrupt-parent = <&UIC0>;
230 interrupt-parent = <&UIC0>;
229 interrupts = <3 4>;
231 interrupts = <0x3 0x4>;
230 };
231
232 GPIO0: gpio@40000700 {
233 /* FIXME */
234 compatible = "ibm,gpio-440gp";
232 };
233
234 GPIO0: gpio@40000700 {
235 /* FIXME */
236 compatible = "ibm,gpio-440gp";
235 reg = <40000700 20>;
237 reg = <0x40000700 0x00000020>;
236 };
237
238 ZMII0: emac-zmii@40000780 {
239 compatible = "ibm,zmii-440gp", "ibm,zmii";
238 };
239
240 ZMII0: emac-zmii@40000780 {
241 compatible = "ibm,zmii-440gp", "ibm,zmii";
240 reg = <40000780 c>;
242 reg = <0x40000780 0x0000000c>;
241 };
242
243 EMAC0: ethernet@40000800 {
244 device_type = "network";
245 compatible = "ibm,emac-440gp", "ibm,emac";
246 interrupt-parent = <&UIC1>;
243 };
244
245 EMAC0: ethernet@40000800 {
246 device_type = "network";
247 compatible = "ibm,emac-440gp", "ibm,emac";
248 interrupt-parent = <&UIC1>;
247 interrupts = <1c 4 1d 4>;
248 reg = <40000800 70>;
249 interrupts = <0x1c 0x4 0x1d 0x4>;
250 reg = <0x40000800 0x00000070>;
249 local-mac-address = [000000000000]; // Filled in by zImage
250 mal-device = <&MAL0>;
251 mal-tx-channel = <0 1>;
252 mal-rx-channel = <0>;
253 cell-index = <0>;
251 local-mac-address = [000000000000]; // Filled in by zImage
252 mal-device = <&MAL0>;
253 mal-tx-channel = <0 1>;
254 mal-rx-channel = <0>;
255 cell-index = <0>;
254 max-frame-size = <5dc>;
255 rx-fifo-size = <1000>;
256 tx-fifo-size = <800>;
256 max-frame-size = <1500>;
257 rx-fifo-size = <4096>;
258 tx-fifo-size = <2048>;
257 phy-mode = "rmii";
259 phy-mode = "rmii";
258 phy-map = <00000001>;
260 phy-map = <0x00000001>;
259 zmii-device = <&ZMII0>;
260 zmii-channel = <0>;
261 };
262 EMAC1: ethernet@40000900 {
263 device_type = "network";
264 compatible = "ibm,emac-440gp", "ibm,emac";
265 interrupt-parent = <&UIC1>;
261 zmii-device = <&ZMII0>;
262 zmii-channel = <0>;
263 };
264 EMAC1: ethernet@40000900 {
265 device_type = "network";
266 compatible = "ibm,emac-440gp", "ibm,emac";
267 interrupt-parent = <&UIC1>;
266 interrupts = <1e 4 1f 4>;
267 reg = <40000900 70>;
268 interrupts = <0x1e 0x4 0x1f 0x4>;
269 reg = <0x40000900 0x00000070>;
268 local-mac-address = [000000000000]; // Filled in by zImage
269 mal-device = <&MAL0>;
270 mal-tx-channel = <2 3>;
271 mal-rx-channel = <1>;
272 cell-index = <1>;
270 local-mac-address = [000000000000]; // Filled in by zImage
271 mal-device = <&MAL0>;
272 mal-tx-channel = <2 3>;
273 mal-rx-channel = <1>;
274 cell-index = <1>;
273 max-frame-size = <5dc>;
274 rx-fifo-size = <1000>;
275 tx-fifo-size = <800>;
275 max-frame-size = <1500>;
276 rx-fifo-size = <4096>;
277 tx-fifo-size = <2048>;
276 phy-mode = "rmii";
278 phy-mode = "rmii";
277 phy-map = <00000001>;
279 phy-map = <0x00000001>;
278 zmii-device = <&ZMII0>;
279 zmii-channel = <1>;
280 };
281
282
283 GPT0: gpt@40000a00 {
284 /* FIXME */
280 zmii-device = <&ZMII0>;
281 zmii-channel = <1>;
282 };
283
284
285 GPT0: gpt@40000a00 {
286 /* FIXME */
285 reg = <40000a00 d4>;
287 reg = <0x40000a00 0x000000d4>;
286 interrupt-parent = <&UIC0>;
288 interrupt-parent = <&UIC0>;
287 interrupts = <12 4 13 4 14 4 15 4 16 4>;
289 interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>;
288 };
289
290 };
291
292 PCIX0: pci@20ec00000 {
293 device_type = "pci";
294 #interrupt-cells = <1>;
295 #size-cells = <2>;
296 #address-cells = <3>;
297 compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
298 primary;
290 };
291
292 };
293
294 PCIX0: pci@20ec00000 {
295 device_type = "pci";
296 #interrupt-cells = <1>;
297 #size-cells = <2>;
298 #address-cells = <3>;
299 compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
300 primary;
299 reg = <2 0ec00000 8 /* Config space access */
300 0 0 0 /* no IACK cycles */
301 2 0ed00000 4 /* Special cycles */
302 2 0ec80000 f0 /* Internal registers */
303 2 0ec80100 fc>; /* Internal messaging registers */
301 reg = <0x00000002 0x0ec00000 0x00000008 /* Config space access */
302 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
303 0x00000002 0x0ed00000 0x00000004 /* Special cycles */
304 0x00000002 0x0ec80000 0x000000f0 /* Internal registers */
305 0x00000002 0x0ec80100 0x000000fc>; /* Internal messaging registers */
304
305 /* Outbound ranges, one memory and one IO,
306 * later cannot be changed
307 */
306
307 /* Outbound ranges, one memory and one IO,
308 * later cannot be changed
309 */
308 ranges = <02000000 0 80000000 00000003 80000000 0 80000000
309 01000000 0 00000000 00000002 08000000 0 00010000>;
310 ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000
311 0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>;
310
311 /* Inbound 2GB range starting at 0 */
312
313 /* Inbound 2GB range starting at 0 */
312 dma-ranges = <42000000 0 0 0 0 0 80000000>;
314 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
313
314 /* Ebony has all 4 IRQ pins tied together per slot */
315
316 /* Ebony has all 4 IRQ pins tied together per slot */
315 interrupt-map-mask = <f800 0 0 0>;
317 interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
316 interrupt-map = <
317 /* IDSEL 1 */
318 interrupt-map = <
319 /* IDSEL 1 */
318 0800 0 0 0 &UIC0 17 8
320 0x800 0x0 0x0 0x0 &UIC0 0x17 0x8
319
320 /* IDSEL 2 */
321
322 /* IDSEL 2 */
321 1000 0 0 0 &UIC0 18 8
323 0x1000 0x0 0x0 0x0 &UIC0 0x18 0x8
322
323 /* IDSEL 3 */
324
325 /* IDSEL 3 */
324 1800 0 0 0 &UIC0 19 8
326 0x1800 0x0 0x0 0x0 &UIC0 0x19 0x8
325
326 /* IDSEL 4 */
327
328 /* IDSEL 4 */
327 2000 0 0 0 &UIC0 1a 8
329 0x2000 0x0 0x0 0x0 &UIC0 0x1a 0x8
328 >;
329 };
330 };
331
332 chosen {
333 linux,stdout-path = "/plb/opb/serial@40000200";
334 };
335};
330 >;
331 };
332 };
333
334 chosen {
335 linux,stdout-path = "/plb/opb/serial@40000200";
336 };
337};