canyonlands.dts (018f76ec516c09a5381e517d0739d377a60ec0d5) canyonlands.dts (049359d655277c382683a6030ae0bac485568ffc)
1/*
2 * Device Tree Source for AMCC Canyonlands (460EX)
3 *
4 * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.

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122 ranges;
123 clock-frequency = <0>; /* Filled in by U-Boot */
124
125 SDRAM0: sdram {
126 compatible = "ibm,sdram-460ex", "ibm,sdram-405gp";
127 dcr-reg = <0x010 0x002>;
128 };
129
1/*
2 * Device Tree Source for AMCC Canyonlands (460EX)
3 *
4 * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.

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122 ranges;
123 clock-frequency = <0>; /* Filled in by U-Boot */
124
125 SDRAM0: sdram {
126 compatible = "ibm,sdram-460ex", "ibm,sdram-405gp";
127 dcr-reg = <0x010 0x002>;
128 };
129
130 CRYPTO: crypto@180000 {
131 compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";
132 reg = <4 0x00180000 0x80400>;
133 interrupt-parent = <&UIC0>;
134 interrupts = <0x1d 0x4>;
135 };
136
130 MAL0: mcmal {
131 compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
132 dcr-reg = <0x180 0x062>;
133 num-tx-chans = <2>;
134 num-rx-chans = <16>;
135 #address-cells = <0>;
136 #size-cells = <0>;
137 interrupt-parent = <&UIC2>;
138 interrupts = < /*TXEOB*/ 0x6 0x4
139 /*RXEOB*/ 0x7 0x4
140 /*SERR*/ 0x3 0x4
141 /*TXDE*/ 0x4 0x4
142 /*RXDE*/ 0x5 0x4>;
143 };
144
137 MAL0: mcmal {
138 compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
139 dcr-reg = <0x180 0x062>;
140 num-tx-chans = <2>;
141 num-rx-chans = <16>;
142 #address-cells = <0>;
143 #size-cells = <0>;
144 interrupt-parent = <&UIC2>;
145 interrupts = < /*TXEOB*/ 0x6 0x4
146 /*RXEOB*/ 0x7 0x4
147 /*SERR*/ 0x3 0x4
148 /*TXDE*/ 0x4 0x4
149 /*RXDE*/ 0x5 0x4>;
150 };
151
145 USB0: ehci@bffd0400 {
146 compatible = "ibm,usb-ehci-460ex", "usb-ehci";
147 interrupt-parent = <&UIC2>;
148 interrupts = <0x1d 4>;
149 reg = <4 0xbffd0400 0x90 4 0xbffd0490 0x70>;
150 };
151
152 USB1: usb@bffd0000 {
153 compatible = "ohci-le";
154 reg = <4 0xbffd0000 0x60>;
155 interrupt-parent = <&UIC2>;
156 interrupts = <0x1e 4>;
157 };
158
159 POB0: opb {
160 compatible = "ibm,opb-460ex", "ibm,opb";
161 #address-cells = <1>;
162 #size-cells = <1>;
163 ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
164 clock-frequency = <0>; /* Filled in by U-Boot */
165
166 EBC0: ebc {

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254 interrupts = <0x1e 0x4>;
255 };
256
257 IIC0: i2c@ef600700 {
258 compatible = "ibm,iic-460ex", "ibm,iic";
259 reg = <0xef600700 0x00000014>;
260 interrupt-parent = <&UIC0>;
261 interrupts = <0x2 0x4>;
152 POB0: opb {
153 compatible = "ibm,opb-460ex", "ibm,opb";
154 #address-cells = <1>;
155 #size-cells = <1>;
156 ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
157 clock-frequency = <0>; /* Filled in by U-Boot */
158
159 EBC0: ebc {

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247 interrupts = <0x1e 0x4>;
248 };
249
250 IIC0: i2c@ef600700 {
251 compatible = "ibm,iic-460ex", "ibm,iic";
252 reg = <0xef600700 0x00000014>;
253 interrupt-parent = <&UIC0>;
254 interrupts = <0x2 0x4>;
262 #address-cells = <1>;
263 #size-cells = <0>;
264 rtc@68 {
265 compatible = "stm,m41t80";
266 reg = <0x68>;
267 interrupt-parent = <&UIC2>;
268 interrupts = <0x19 0x8>;
269 };
270 sttm@48 {
271 compatible = "ad,ad7414";
272 reg = <0x48>;
273 interrupt-parent = <&UIC1>;
274 interrupts = <0x14 0x8>;
275 };
276 };
277
278 IIC1: i2c@ef600800 {
279 compatible = "ibm,iic-460ex", "ibm,iic";
280 reg = <0xef600800 0x00000014>;
281 interrupt-parent = <&UIC0>;
282 interrupts = <0x3 0x4>;
283 };

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256
257 IIC1: i2c@ef600800 {
258 compatible = "ibm,iic-460ex", "ibm,iic";
259 reg = <0xef600800 0x00000014>;
260 interrupt-parent = <&UIC0>;
261 interrupts = <0x3 0x4>;
262 };

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