bluestone.dts (d392da5207352f09030e95d9ea335a4225667ec0) | bluestone.dts (6bd121e2d4dcabb145d390a7131ec83102dfb838) |
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1/* 2 * Device Tree for Bluestone (APM821xx) board. 3 * 4 * Copyright (c) 2010, Applied Micro Circuits Corporation 5 * Author: Tirumala R Marri <tmarri@apm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as --- 19 unchanged lines hidden (view full) --- 28 #size-cells = <1>; 29 model = "apm,bluestone"; 30 compatible = "apm,bluestone"; 31 dcr-parent = <&{/cpus/cpu@0}>; 32 33 aliases { 34 ethernet0 = &EMAC0; 35 serial0 = &UART0; | 1/* 2 * Device Tree for Bluestone (APM821xx) board. 3 * 4 * Copyright (c) 2010, Applied Micro Circuits Corporation 5 * Author: Tirumala R Marri <tmarri@apm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as --- 19 unchanged lines hidden (view full) --- 28 #size-cells = <1>; 29 model = "apm,bluestone"; 30 compatible = "apm,bluestone"; 31 dcr-parent = <&{/cpus/cpu@0}>; 32 33 aliases { 34 ethernet0 = &EMAC0; 35 serial0 = &UART0; |
36 serial1 = &UART1; | 36 //serial1 = &UART1; --gcl missing UART1 label |
37 }; 38 39 cpus { 40 #address-cells = <1>; 41 #size-cells = <0>; 42 43 cpu@0 { 44 device_type = "cpu"; 45 model = "PowerPC,apm821xx"; 46 reg = <0x00000000>; 47 clock-frequency = <0>; /* Filled in by U-Boot */ 48 timebase-frequency = <0>; /* Filled in by U-Boot */ 49 i-cache-line-size = <32>; 50 d-cache-line-size = <32>; 51 i-cache-size = <32768>; 52 d-cache-size = <32768>; 53 dcr-controller; 54 dcr-access-method = "native"; | 37 }; 38 39 cpus { 40 #address-cells = <1>; 41 #size-cells = <0>; 42 43 cpu@0 { 44 device_type = "cpu"; 45 model = "PowerPC,apm821xx"; 46 reg = <0x00000000>; 47 clock-frequency = <0>; /* Filled in by U-Boot */ 48 timebase-frequency = <0>; /* Filled in by U-Boot */ 49 i-cache-line-size = <32>; 50 d-cache-line-size = <32>; 51 i-cache-size = <32768>; 52 d-cache-size = <32768>; 53 dcr-controller; 54 dcr-access-method = "native"; |
55 next-level-cache = <&L2C0>; | 55 //next-level-cache = <&L2C0>; --gcl missing L2C0 label |
56 }; 57 }; 58 59 memory { 60 device_type = "memory"; 61 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ 62 }; 63 --- 73 unchanged lines hidden (view full) --- 137 num-rx-chans = <1>; 138 #address-cells = <0>; 139 #size-cells = <0>; 140 interrupt-parent = <&UIC2>; 141 interrupts = < /*TXEOB*/ 0x6 0x4 142 /*RXEOB*/ 0x7 0x4 143 /*SERR*/ 0x3 0x4 144 /*TXDE*/ 0x4 0x4 | 56 }; 57 }; 58 59 memory { 60 device_type = "memory"; 61 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ 62 }; 63 --- 73 unchanged lines hidden (view full) --- 137 num-rx-chans = <1>; 138 #address-cells = <0>; 139 #size-cells = <0>; 140 interrupt-parent = <&UIC2>; 141 interrupts = < /*TXEOB*/ 0x6 0x4 142 /*RXEOB*/ 0x7 0x4 143 /*SERR*/ 0x3 0x4 144 /*TXDE*/ 0x4 0x4 |
145 /*RXDE*/ 0x5 0x4 | 145 /*RXDE*/ 0x5 0x4>; |
146 }; 147 148 POB0: opb { 149 compatible = "ibm,opb"; 150 #address-cells = <1>; 151 #size-cells = <1>; 152 ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; 153 clock-frequency = <0>; /* Filled in by U-Boot */ --- 23 unchanged lines hidden (view full) --- 177 label = "env"; 178 reg = <0x00180000 0x00020000>; 179 }; 180 partition@1a0000 { 181 label = "u-boot"; 182 reg = <0x001a0000 0x00060000>; 183 }; 184 }; | 146 }; 147 148 POB0: opb { 149 compatible = "ibm,opb"; 150 #address-cells = <1>; 151 #size-cells = <1>; 152 ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; 153 clock-frequency = <0>; /* Filled in by U-Boot */ --- 23 unchanged lines hidden (view full) --- 177 label = "env"; 178 reg = <0x00180000 0x00020000>; 179 }; 180 partition@1a0000 { 181 label = "u-boot"; 182 reg = <0x001a0000 0x00060000>; 183 }; 184 }; |
185 } | 185 }; |
186 187 UART0: serial@ef600300 { 188 device_type = "serial"; 189 compatible = "ns16550"; 190 reg = <0xef600300 0x00000008>; 191 virtual-reg = <0xef600300>; 192 clock-frequency = <0>; /* Filled in by U-Boot */ 193 current-speed = <0>; /* Filled in by U-Boot */ --- 61 unchanged lines hidden --- | 186 187 UART0: serial@ef600300 { 188 device_type = "serial"; 189 compatible = "ns16550"; 190 reg = <0xef600300 0x00000008>; 191 virtual-reg = <0xef600300>; 192 clock-frequency = <0>; /* Filled in by U-Boot */ 193 current-speed = <0>; /* Filled in by U-Boot */ --- 61 unchanged lines hidden --- |