bluestone.dts (8dfc2b45ffc722c4291f24f1f40c64e448b9b5b4) | bluestone.dts (b5594a7760fa048730db64c501cf4534df06b3b3) |
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1/* 2 * Device Tree for Bluestone (APM821xx) board. 3 * 4 * Copyright (c) 2010, Applied Micro Circuits Corporation 5 * Author: Tirumala R Marri <tmarri@apm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as --- 19 unchanged lines hidden (view full) --- 28 #size-cells = <1>; 29 model = "apm,bluestone"; 30 compatible = "apm,bluestone"; 31 dcr-parent = <&{/cpus/cpu@0}>; 32 33 aliases { 34 ethernet0 = &EMAC0; 35 serial0 = &UART0; | 1/* 2 * Device Tree for Bluestone (APM821xx) board. 3 * 4 * Copyright (c) 2010, Applied Micro Circuits Corporation 5 * Author: Tirumala R Marri <tmarri@apm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as --- 19 unchanged lines hidden (view full) --- 28 #size-cells = <1>; 29 model = "apm,bluestone"; 30 compatible = "apm,bluestone"; 31 dcr-parent = <&{/cpus/cpu@0}>; 32 33 aliases { 34 ethernet0 = &EMAC0; 35 serial0 = &UART0; |
36 //serial1 = &UART1; --gcl missing UART1 label | 36 serial1 = &UART1; |
37 }; 38 39 cpus { 40 #address-cells = <1>; 41 #size-cells = <0>; 42 43 cpu@0 { 44 device_type = "cpu"; 45 model = "PowerPC,apm821xx"; 46 reg = <0x00000000>; 47 clock-frequency = <0>; /* Filled in by U-Boot */ 48 timebase-frequency = <0>; /* Filled in by U-Boot */ 49 i-cache-line-size = <32>; 50 d-cache-line-size = <32>; 51 i-cache-size = <32768>; 52 d-cache-size = <32768>; 53 dcr-controller; 54 dcr-access-method = "native"; | 37 }; 38 39 cpus { 40 #address-cells = <1>; 41 #size-cells = <0>; 42 43 cpu@0 { 44 device_type = "cpu"; 45 model = "PowerPC,apm821xx"; 46 reg = <0x00000000>; 47 clock-frequency = <0>; /* Filled in by U-Boot */ 48 timebase-frequency = <0>; /* Filled in by U-Boot */ 49 i-cache-line-size = <32>; 50 d-cache-line-size = <32>; 51 i-cache-size = <32768>; 52 d-cache-size = <32768>; 53 dcr-controller; 54 dcr-access-method = "native"; |
55 //next-level-cache = <&L2C0>; --gcl missing L2C0 label | 55 next-level-cache = <&L2C0>; |
56 }; 57 }; 58 59 memory { 60 device_type = "memory"; 61 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ 62 }; 63 --- 48 unchanged lines hidden (view full) --- 112 dcr-reg = <0x00e 0x002>; 113 }; 114 115 CPR0: cpr { 116 compatible = "ibm,cpr-apm821xx"; 117 dcr-reg = <0x00c 0x002>; 118 }; 119 | 56 }; 57 }; 58 59 memory { 60 device_type = "memory"; 61 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ 62 }; 63 --- 48 unchanged lines hidden (view full) --- 112 dcr-reg = <0x00e 0x002>; 113 }; 114 115 CPR0: cpr { 116 compatible = "ibm,cpr-apm821xx"; 117 dcr-reg = <0x00c 0x002>; 118 }; 119 |
120 L2C0: l2c { 121 compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache"; 122 dcr-reg = <0x020 0x008 123 0x030 0x008>; 124 cache-line-size = <32>; 125 cache-size = <262144>; 126 interrupt-parent = <&UIC1>; 127 interrupts = <11 1>; 128 }; 129 |
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120 plb { 121 compatible = "ibm,plb4"; 122 #address-cells = <2>; 123 #size-cells = <1>; 124 ranges; 125 clock-frequency = <0>; /* Filled in by U-Boot */ 126 127 SDRAM0: sdram { --- 49 unchanged lines hidden (view full) --- 177 label = "env"; 178 reg = <0x00180000 0x00020000>; 179 }; 180 partition@1a0000 { 181 label = "u-boot"; 182 reg = <0x001a0000 0x00060000>; 183 }; 184 }; | 130 plb { 131 compatible = "ibm,plb4"; 132 #address-cells = <2>; 133 #size-cells = <1>; 134 ranges; 135 clock-frequency = <0>; /* Filled in by U-Boot */ 136 137 SDRAM0: sdram { --- 49 unchanged lines hidden (view full) --- 187 label = "env"; 188 reg = <0x00180000 0x00020000>; 189 }; 190 partition@1a0000 { 191 label = "u-boot"; 192 reg = <0x001a0000 0x00060000>; 193 }; 194 }; |
195 196 ndfc@1,0 { 197 compatible = "ibm,ndfc"; 198 reg = <0x00000003 0x00000000 0x00002000>; 199 ccr = <0x00001000>; 200 bank-settings = <0x80002222>; 201 #address-cells = <1>; 202 #size-cells = <1>; 203 /* 2Gb Nand Flash */ 204 nand { 205 #address-cells = <1>; 206 #size-cells = <1>; 207 208 partition@0 { 209 label = "firmware"; 210 reg = <0x00000000 0x00C00000>; 211 }; 212 partition@c00000 { 213 label = "environment"; 214 reg = <0x00C00000 0x00B00000>; 215 }; 216 partition@1700000 { 217 label = "kernel"; 218 reg = <0x01700000 0x00E00000>; 219 }; 220 partition@2500000 { 221 label = "root"; 222 reg = <0x02500000 0x08200000>; 223 }; 224 partition@a700000 { 225 label = "device-tree"; 226 reg = <0x0A700000 0x00B00000>; 227 }; 228 partition@b200000 { 229 label = "config"; 230 reg = <0x0B200000 0x00D00000>; 231 }; 232 partition@bf00000 { 233 label = "diag"; 234 reg = <0x0BF00000 0x00C00000>; 235 }; 236 partition@cb00000 { 237 label = "vendor"; 238 reg = <0x0CB00000 0x3500000>; 239 }; 240 }; 241 }; |
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185 }; 186 187 UART0: serial@ef600300 { 188 device_type = "serial"; 189 compatible = "ns16550"; 190 reg = <0xef600300 0x00000008>; 191 virtual-reg = <0xef600300>; 192 clock-frequency = <0>; /* Filled in by U-Boot */ 193 current-speed = <0>; /* Filled in by U-Boot */ 194 interrupt-parent = <&UIC1>; 195 interrupts = <0x1 0x4>; 196 }; 197 | 242 }; 243 244 UART0: serial@ef600300 { 245 device_type = "serial"; 246 compatible = "ns16550"; 247 reg = <0xef600300 0x00000008>; 248 virtual-reg = <0xef600300>; 249 clock-frequency = <0>; /* Filled in by U-Boot */ 250 current-speed = <0>; /* Filled in by U-Boot */ 251 interrupt-parent = <&UIC1>; 252 interrupts = <0x1 0x4>; 253 }; 254 |
255 UART1: serial@ef600400 { 256 device_type = "serial"; 257 compatible = "ns16550"; 258 reg = <0xef600400 0x00000008>; 259 virtual-reg = <0xef600400>; 260 clock-frequency = <0>; /* Filled in by U-Boot */ 261 current-speed = <0>; /* Filled in by U-Boot */ 262 interrupt-parent = <&UIC0>; 263 interrupts = <0x1 0x4>; 264 }; 265 |
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198 IIC0: i2c@ef600700 { 199 compatible = "ibm,iic"; 200 reg = <0xef600700 0x00000014>; 201 interrupt-parent = <&UIC0>; 202 interrupts = <0x2 0x4>; | 266 IIC0: i2c@ef600700 { 267 compatible = "ibm,iic"; 268 reg = <0xef600700 0x00000014>; 269 interrupt-parent = <&UIC0>; 270 interrupts = <0x2 0x4>; |
271 #address-cells = <1>; 272 #size-cells = <0>; 273 rtc@68 { 274 compatible = "stm,m41t80"; 275 reg = <0x68>; 276 interrupt-parent = <&UIC0>; 277 interrupts = <0x9 0x8>; 278 }; 279 sttm@4C { 280 compatible = "adm,adm1032"; 281 reg = <0x4C>; 282 interrupt-parent = <&UIC1>; 283 interrupts = <0x1E 0x8>; /* CPU_THERNAL_L */ 284 }; |
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203 }; 204 205 IIC1: i2c@ef600800 { 206 compatible = "ibm,iic"; 207 reg = <0xef600800 0x00000014>; 208 interrupt-parent = <&UIC0>; 209 interrupts = <0x3 0x4>; 210 }; --- 6 unchanged lines hidden (view full) --- 217 218 TAH0: emac-tah@ef601350 { 219 compatible = "ibm,tah"; 220 reg = <0xef601350 0x00000030>; 221 }; 222 223 EMAC0: ethernet@ef600c00 { 224 device_type = "network"; | 285 }; 286 287 IIC1: i2c@ef600800 { 288 compatible = "ibm,iic"; 289 reg = <0xef600800 0x00000014>; 290 interrupt-parent = <&UIC0>; 291 interrupts = <0x3 0x4>; 292 }; --- 6 unchanged lines hidden (view full) --- 299 300 TAH0: emac-tah@ef601350 { 301 compatible = "ibm,tah"; 302 reg = <0xef601350 0x00000030>; 303 }; 304 305 EMAC0: ethernet@ef600c00 { 306 device_type = "network"; |
225 compatible = "ibm,emac-apm821xx", "ibm,emac4sync"; | 307 compatible = "ibm,emac4sync"; |
226 interrupt-parent = <&EMAC0>; 227 interrupts = <0x0 0x1>; 228 #interrupt-cells = <1>; 229 #address-cells = <0>; 230 #size-cells = <0>; 231 interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 232 /*Wake*/ 0x1 &UIC2 0x14 0x4>; 233 reg = <0xef600c00 0x000000c4>; --- 11 unchanged lines hidden (view full) --- 245 rgmii-channel = <0>; 246 tah-device = <&TAH0>; 247 tah-channel = <0>; 248 has-inverted-stacr-oc; 249 has-new-stacr-staopc; 250 }; 251 }; 252 | 308 interrupt-parent = <&EMAC0>; 309 interrupts = <0x0 0x1>; 310 #interrupt-cells = <1>; 311 #address-cells = <0>; 312 #size-cells = <0>; 313 interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 314 /*Wake*/ 0x1 &UIC2 0x14 0x4>; 315 reg = <0xef600c00 0x000000c4>; --- 11 unchanged lines hidden (view full) --- 327 rgmii-channel = <0>; 328 tah-device = <&TAH0>; 329 tah-channel = <0>; 330 has-inverted-stacr-oc; 331 has-new-stacr-staopc; 332 }; 333 }; 334 |
335 PCIE0: pciex@d00000000 { 336 device_type = "pci"; 337 #interrupt-cells = <1>; 338 #size-cells = <2>; 339 #address-cells = <3>; 340 compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex"; 341 primary; 342 port = <0x0>; /* port number */ 343 reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ 344 0x0000000c 0x08010000 0x00001000>; /* Registers */ 345 dcr-reg = <0x100 0x020>; 346 sdr-base = <0x300>; 347 348 /* Outbound ranges, one memory and one IO, 349 * later cannot be changed 350 */ 351 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 352 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000 353 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; 354 355 /* Inbound 2GB range starting at 0 */ 356 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; 357 358 /* This drives busses 40 to 0x7f */ 359 bus-range = <0x40 0x7f>; 360 361 /* Legacy interrupts (note the weird polarity, the bridge seems 362 * to invert PCIe legacy interrupts). 363 * We are de-swizzling here because the numbers are actually for 364 * port of the root complex virtual P2P bridge. But I want 365 * to avoid putting a node for it in the tree, so the numbers 366 * below are basically de-swizzled numbers. 367 * The real slot is on idsel 0, so the swizzling is 1:1 368 */ 369 interrupt-map-mask = <0x0 0x0 0x0 0x7>; 370 interrupt-map = < 371 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */ 372 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */ 373 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */ 374 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>; 375 }; |
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253 }; 254}; | 376 }; 377}; |