| pacache.S (37318a3cb1028933417533084ddbf9d84be06878) | pacache.S (9b3b331d0322b60de1bde20528bf974f62804ffa) |
|---|---|
| 1/* 2 * PARISC TLB and cache flushing support 3 * Copyright (C) 2000-2001 Hewlett-Packard (John Marvin) 4 * Copyright (C) 2001 Matthew Wilcox (willy at parisc-linux.org) 5 * Copyright (C) 2002 Richard Hirst (rhirst with parisc-linux.org) 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by --- 213 unchanged lines hidden (view full) --- 222 LDREG ICACHE_COUNT(%r1), %arg2 223 LDREG ICACHE_LOOP(%r1), %arg3 224 rsm PSW_SM_I, %r22 /* No mmgt ops during loop*/ 225 ADDIB= -1, %arg3, fioneloop /* Preadjust and test */ 226 movb,<,n %arg3, %r31, fisync /* If loop < 0, do sync */ 227 228fimanyloop: /* Loop if LOOP >= 2 */ 229 ADDIB> -1, %r31, fimanyloop /* Adjusted inner loop decr */ | 1/* 2 * PARISC TLB and cache flushing support 3 * Copyright (C) 2000-2001 Hewlett-Packard (John Marvin) 4 * Copyright (C) 2001 Matthew Wilcox (willy at parisc-linux.org) 5 * Copyright (C) 2002 Richard Hirst (rhirst with parisc-linux.org) 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by --- 213 unchanged lines hidden (view full) --- 222 LDREG ICACHE_COUNT(%r1), %arg2 223 LDREG ICACHE_LOOP(%r1), %arg3 224 rsm PSW_SM_I, %r22 /* No mmgt ops during loop*/ 225 ADDIB= -1, %arg3, fioneloop /* Preadjust and test */ 226 movb,<,n %arg3, %r31, fisync /* If loop < 0, do sync */ 227 228fimanyloop: /* Loop if LOOP >= 2 */ 229 ADDIB> -1, %r31, fimanyloop /* Adjusted inner loop decr */ |
| 230 fice 0(%sr1, %arg0) | 230 fice %r0(%sr1, %arg0) |
| 231 fice,m %arg1(%sr1, %arg0) /* Last fice and addr adjust */ 232 movb,tr %arg3, %r31, fimanyloop /* Re-init inner loop count */ 233 ADDIB<=,n -1, %arg2, fisync /* Outer loop decr */ 234 235fioneloop: /* Loop if LOOP = 1 */ 236 ADDIB> -1, %arg2, fioneloop /* Outer loop count decr */ 237 fice,m %arg1(%sr1, %arg0) /* Fice for one loop */ 238 --- 25 unchanged lines hidden (view full) --- 264 LDREG DCACHE_COUNT(%r1), %arg2 265 LDREG DCACHE_LOOP(%r1), %arg3 266 rsm PSW_SM_I, %r22 267 ADDIB= -1, %arg3, fdoneloop /* Preadjust and test */ 268 movb,<,n %arg3, %r31, fdsync /* If loop < 0, do sync */ 269 270fdmanyloop: /* Loop if LOOP >= 2 */ 271 ADDIB> -1, %r31, fdmanyloop /* Adjusted inner loop decr */ | 231 fice,m %arg1(%sr1, %arg0) /* Last fice and addr adjust */ 232 movb,tr %arg3, %r31, fimanyloop /* Re-init inner loop count */ 233 ADDIB<=,n -1, %arg2, fisync /* Outer loop decr */ 234 235fioneloop: /* Loop if LOOP = 1 */ 236 ADDIB> -1, %arg2, fioneloop /* Outer loop count decr */ 237 fice,m %arg1(%sr1, %arg0) /* Fice for one loop */ 238 --- 25 unchanged lines hidden (view full) --- 264 LDREG DCACHE_COUNT(%r1), %arg2 265 LDREG DCACHE_LOOP(%r1), %arg3 266 rsm PSW_SM_I, %r22 267 ADDIB= -1, %arg3, fdoneloop /* Preadjust and test */ 268 movb,<,n %arg3, %r31, fdsync /* If loop < 0, do sync */ 269 270fdmanyloop: /* Loop if LOOP >= 2 */ 271 ADDIB> -1, %r31, fdmanyloop /* Adjusted inner loop decr */ |
| 272 fdce 0(%sr1, %arg0) | 272 fdce %r0(%sr1, %arg0) |
| 273 fdce,m %arg1(%sr1, %arg0) /* Last fdce and addr adjust */ 274 movb,tr %arg3, %r31, fdmanyloop /* Re-init inner loop count */ 275 ADDIB<=,n -1, %arg2, fdsync /* Outer loop decr */ 276 277fdoneloop: /* Loop if LOOP = 1 */ 278 ADDIB> -1, %arg2, fdoneloop /* Outer loop count decr */ 279 fdce,m %arg1(%sr1, %arg0) /* Fdce for one loop */ 280 --- 814 unchanged lines hidden --- | 273 fdce,m %arg1(%sr1, %arg0) /* Last fdce and addr adjust */ 274 movb,tr %arg3, %r31, fdmanyloop /* Re-init inner loop count */ 275 ADDIB<=,n -1, %arg2, fdsync /* Outer loop decr */ 276 277fdoneloop: /* Loop if LOOP = 1 */ 278 ADDIB> -1, %arg2, fdoneloop /* Outer loop count decr */ 279 fdce,m %arg1(%sr1, %arg0) /* Fdce for one loop */ 280 --- 814 unchanged lines hidden --- |