| entry.S (4182d0cdf853fb044b969318289ae9f451f69c86) | entry.S (736d2169338a50c8814efc186b5423aee43b0c68) |
|---|---|
| 1/* 2 * Linux/PA-RISC Project (http://www.parisc-linux.org/) 3 * 4 * kernel entry points (interruptions, system call wrappers) 5 * Copyright (C) 1999,2000 Philipp Rumpf 6 * Copyright (C) 1999 SuSE GmbH Nuernberg 7 * Copyright (C) 2000 Hewlett-Packard (John Marvin) 8 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand) --- 488 unchanged lines hidden (view full) --- 497 /* Set the dirty bit (and accessed bit). No need to be 498 * clever, this is only used from the dirty fault */ 499 .macro update_dirty ptp,pte,tmp 500 ldi _PAGE_ACCESSED|_PAGE_DIRTY,\tmp 501 or \tmp,\pte,\pte 502 STREG \pte,0(\ptp) 503 .endm 504 | 1/* 2 * Linux/PA-RISC Project (http://www.parisc-linux.org/) 3 * 4 * kernel entry points (interruptions, system call wrappers) 5 * Copyright (C) 1999,2000 Philipp Rumpf 6 * Copyright (C) 1999 SuSE GmbH Nuernberg 7 * Copyright (C) 2000 Hewlett-Packard (John Marvin) 8 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand) --- 488 unchanged lines hidden (view full) --- 497 /* Set the dirty bit (and accessed bit). No need to be 498 * clever, this is only used from the dirty fault */ 499 .macro update_dirty ptp,pte,tmp 500 ldi _PAGE_ACCESSED|_PAGE_DIRTY,\tmp 501 or \tmp,\pte,\pte 502 STREG \pte,0(\ptp) 503 .endm 504 |
| 505 /* We have (depending on the page size): 506 * - 38 to 52-bit Physical Page Number 507 * - 12 to 26-bit page offset 508 */ |
|
| 505 /* bitshift difference between a PFN (based on kernel's PAGE_SIZE) 506 * to a CPU TLB 4k PFN (4k => 12 bits to shift) */ | 509 /* bitshift difference between a PFN (based on kernel's PAGE_SIZE) 510 * to a CPU TLB 4k PFN (4k => 12 bits to shift) */ |
| 507 #define PAGE_ADD_SHIFT (PAGE_SHIFT-12) | 511 #define PAGE_ADD_SHIFT (PAGE_SHIFT-12) 512 #define PAGE_ADD_HUGE_SHIFT (REAL_HPAGE_SHIFT-12) |
| 508 509 /* Drop prot bits and convert to page addr for iitlbt and idtlbt */ | 513 514 /* Drop prot bits and convert to page addr for iitlbt and idtlbt */ |
| 510 .macro convert_for_tlb_insert20 pte | 515 .macro convert_for_tlb_insert20 pte,tmp 516#ifdef CONFIG_HUGETLB_PAGE 517 copy \pte,\tmp 518 extrd,u \tmp,(63-ASM_PFN_PTE_SHIFT)+(63-58)+PAGE_ADD_SHIFT,\ 519 64-PAGE_SHIFT-PAGE_ADD_SHIFT,\pte 520 521 depdi _PAGE_SIZE_ENCODING_DEFAULT,63,\ 522 (63-58)+PAGE_ADD_SHIFT,\pte 523 extrd,u,*= \tmp,_PAGE_HPAGE_BIT+32,1,%r0 524 depdi _HUGE_PAGE_SIZE_ENCODING_DEFAULT,63,\ 525 (63-58)+PAGE_ADD_HUGE_SHIFT,\pte 526#else /* Huge pages disabled */ |
| 511 extrd,u \pte,(63-ASM_PFN_PTE_SHIFT)+(63-58)+PAGE_ADD_SHIFT,\ 512 64-PAGE_SHIFT-PAGE_ADD_SHIFT,\pte 513 depdi _PAGE_SIZE_ENCODING_DEFAULT,63,\ 514 (63-58)+PAGE_ADD_SHIFT,\pte | 527 extrd,u \pte,(63-ASM_PFN_PTE_SHIFT)+(63-58)+PAGE_ADD_SHIFT,\ 528 64-PAGE_SHIFT-PAGE_ADD_SHIFT,\pte 529 depdi _PAGE_SIZE_ENCODING_DEFAULT,63,\ 530 (63-58)+PAGE_ADD_SHIFT,\pte |
| 531#endif |
|
| 515 .endm 516 517 /* Convert the pte and prot to tlb insertion values. How 518 * this happens is quite subtle, read below */ | 532 .endm 533 534 /* Convert the pte and prot to tlb insertion values. How 535 * this happens is quite subtle, read below */ |
| 519 .macro make_insert_tlb spc,pte,prot | 536 .macro make_insert_tlb spc,pte,prot,tmp |
| 520 space_to_prot \spc \prot /* create prot id from space */ 521 /* The following is the real subtlety. This is depositing 522 * T <-> _PAGE_REFTRAP 523 * D <-> _PAGE_DIRTY 524 * B <-> _PAGE_DMB (memory break) 525 * 526 * Then incredible subtlety: The access rights are 527 * _PAGE_GATEWAY, _PAGE_EXEC and _PAGE_WRITE --- 20 unchanged lines hidden (view full) --- 548 * Memory/DMA is cache coherent on all PA2.0 machines we support 549 * (that means T-class is NOT supported) and the memory controllers 550 * on most of those machines only handles cache transactions. 551 */ 552 extrd,u,*= \pte,_PAGE_NO_CACHE_BIT+32,1,%r0 553 depdi 1,12,1,\prot 554 555 /* Drop prot bits and convert to page addr for iitlbt and idtlbt */ | 537 space_to_prot \spc \prot /* create prot id from space */ 538 /* The following is the real subtlety. This is depositing 539 * T <-> _PAGE_REFTRAP 540 * D <-> _PAGE_DIRTY 541 * B <-> _PAGE_DMB (memory break) 542 * 543 * Then incredible subtlety: The access rights are 544 * _PAGE_GATEWAY, _PAGE_EXEC and _PAGE_WRITE --- 20 unchanged lines hidden (view full) --- 565 * Memory/DMA is cache coherent on all PA2.0 machines we support 566 * (that means T-class is NOT supported) and the memory controllers 567 * on most of those machines only handles cache transactions. 568 */ 569 extrd,u,*= \pte,_PAGE_NO_CACHE_BIT+32,1,%r0 570 depdi 1,12,1,\prot 571 572 /* Drop prot bits and convert to page addr for iitlbt and idtlbt */ |
| 556 convert_for_tlb_insert20 \pte | 573 convert_for_tlb_insert20 \pte \tmp |
| 557 .endm 558 559 /* Identical macro to make_insert_tlb above, except it 560 * makes the tlb entry for the differently formatted pa11 561 * insertion instructions */ 562 .macro make_insert_tlb_11 spc,pte,prot 563 zdep \spc,30,15,\prot 564 dep \pte,8,7,\prot --- 572 unchanged lines hidden (view full) --- 1137 get_pgd spc,ptp 1138 space_check spc,t0,dtlb_fault 1139 1140 L3_ptep ptp,pte,t0,va,dtlb_check_alias_20w 1141 1142 tlb_lock spc,ptp,pte,t0,t1,dtlb_check_alias_20w 1143 update_accessed ptp,pte,t0,t1 1144 | 574 .endm 575 576 /* Identical macro to make_insert_tlb above, except it 577 * makes the tlb entry for the differently formatted pa11 578 * insertion instructions */ 579 .macro make_insert_tlb_11 spc,pte,prot 580 zdep \spc,30,15,\prot 581 dep \pte,8,7,\prot --- 572 unchanged lines hidden (view full) --- 1154 get_pgd spc,ptp 1155 space_check spc,t0,dtlb_fault 1156 1157 L3_ptep ptp,pte,t0,va,dtlb_check_alias_20w 1158 1159 tlb_lock spc,ptp,pte,t0,t1,dtlb_check_alias_20w 1160 update_accessed ptp,pte,t0,t1 1161 |
| 1145 make_insert_tlb spc,pte,prot | 1162 make_insert_tlb spc,pte,prot,t1 |
| 1146 1147 idtlbt pte,prot 1148 1149 tlb_unlock1 spc,t0 1150 rfir 1151 nop 1152 1153dtlb_check_alias_20w: --- 9 unchanged lines hidden (view full) --- 1163 get_pgd spc,ptp 1164 space_check spc,t0,nadtlb_fault 1165 1166 L3_ptep ptp,pte,t0,va,nadtlb_check_alias_20w 1167 1168 tlb_lock spc,ptp,pte,t0,t1,nadtlb_check_alias_20w 1169 update_accessed ptp,pte,t0,t1 1170 | 1163 1164 idtlbt pte,prot 1165 1166 tlb_unlock1 spc,t0 1167 rfir 1168 nop 1169 1170dtlb_check_alias_20w: --- 9 unchanged lines hidden (view full) --- 1180 get_pgd spc,ptp 1181 space_check spc,t0,nadtlb_fault 1182 1183 L3_ptep ptp,pte,t0,va,nadtlb_check_alias_20w 1184 1185 tlb_lock spc,ptp,pte,t0,t1,nadtlb_check_alias_20w 1186 update_accessed ptp,pte,t0,t1 1187 |
| 1171 make_insert_tlb spc,pte,prot | 1188 make_insert_tlb spc,pte,prot,t1 |
| 1172 1173 idtlbt pte,prot 1174 1175 tlb_unlock1 spc,t0 1176 rfir 1177 nop 1178 1179nadtlb_check_alias_20w: --- 77 unchanged lines hidden (view full) --- 1257 get_pgd spc,ptp 1258 space_check spc,t0,dtlb_fault 1259 1260 L2_ptep ptp,pte,t0,va,dtlb_check_alias_20 1261 1262 tlb_lock spc,ptp,pte,t0,t1,dtlb_check_alias_20 1263 update_accessed ptp,pte,t0,t1 1264 | 1189 1190 idtlbt pte,prot 1191 1192 tlb_unlock1 spc,t0 1193 rfir 1194 nop 1195 1196nadtlb_check_alias_20w: --- 77 unchanged lines hidden (view full) --- 1274 get_pgd spc,ptp 1275 space_check spc,t0,dtlb_fault 1276 1277 L2_ptep ptp,pte,t0,va,dtlb_check_alias_20 1278 1279 tlb_lock spc,ptp,pte,t0,t1,dtlb_check_alias_20 1280 update_accessed ptp,pte,t0,t1 1281 |
| 1265 make_insert_tlb spc,pte,prot | 1282 make_insert_tlb spc,pte,prot,t1 |
| 1266 1267 f_extend pte,t1 1268 1269 idtlbt pte,prot 1270 1271 tlb_unlock1 spc,t0 1272 rfir 1273 nop --- 11 unchanged lines hidden (view full) --- 1285 1286 space_check spc,t0,nadtlb_fault 1287 1288 L2_ptep ptp,pte,t0,va,nadtlb_check_alias_20 1289 1290 tlb_lock spc,ptp,pte,t0,t1,nadtlb_check_alias_20 1291 update_accessed ptp,pte,t0,t1 1292 | 1283 1284 f_extend pte,t1 1285 1286 idtlbt pte,prot 1287 1288 tlb_unlock1 spc,t0 1289 rfir 1290 nop --- 11 unchanged lines hidden (view full) --- 1302 1303 space_check spc,t0,nadtlb_fault 1304 1305 L2_ptep ptp,pte,t0,va,nadtlb_check_alias_20 1306 1307 tlb_lock spc,ptp,pte,t0,t1,nadtlb_check_alias_20 1308 update_accessed ptp,pte,t0,t1 1309 |
| 1293 make_insert_tlb spc,pte,prot | 1310 make_insert_tlb spc,pte,prot,t1 |
| 1294 1295 f_extend pte,t1 1296 1297 idtlbt pte,prot 1298 1299 tlb_unlock1 spc,t0 1300 rfir 1301 nop --- 92 unchanged lines hidden (view full) --- 1394 get_pgd spc,ptp 1395 space_check spc,t0,itlb_fault 1396 1397 L3_ptep ptp,pte,t0,va,itlb_fault 1398 1399 tlb_lock spc,ptp,pte,t0,t1,itlb_fault 1400 update_accessed ptp,pte,t0,t1 1401 | 1311 1312 f_extend pte,t1 1313 1314 idtlbt pte,prot 1315 1316 tlb_unlock1 spc,t0 1317 rfir 1318 nop --- 92 unchanged lines hidden (view full) --- 1411 get_pgd spc,ptp 1412 space_check spc,t0,itlb_fault 1413 1414 L3_ptep ptp,pte,t0,va,itlb_fault 1415 1416 tlb_lock spc,ptp,pte,t0,t1,itlb_fault 1417 update_accessed ptp,pte,t0,t1 1418 |
| 1402 make_insert_tlb spc,pte,prot | 1419 make_insert_tlb spc,pte,prot,t1 |
| 1403 1404 iitlbt pte,prot 1405 1406 tlb_unlock1 spc,t0 1407 rfir 1408 nop 1409 1410naitlb_miss_20w: --- 7 unchanged lines hidden (view full) --- 1418 get_pgd spc,ptp 1419 space_check spc,t0,naitlb_fault 1420 1421 L3_ptep ptp,pte,t0,va,naitlb_check_alias_20w 1422 1423 tlb_lock spc,ptp,pte,t0,t1,naitlb_check_alias_20w 1424 update_accessed ptp,pte,t0,t1 1425 | 1420 1421 iitlbt pte,prot 1422 1423 tlb_unlock1 spc,t0 1424 rfir 1425 nop 1426 1427naitlb_miss_20w: --- 7 unchanged lines hidden (view full) --- 1435 get_pgd spc,ptp 1436 space_check spc,t0,naitlb_fault 1437 1438 L3_ptep ptp,pte,t0,va,naitlb_check_alias_20w 1439 1440 tlb_lock spc,ptp,pte,t0,t1,naitlb_check_alias_20w 1441 update_accessed ptp,pte,t0,t1 1442 |
| 1426 make_insert_tlb spc,pte,prot | 1443 make_insert_tlb spc,pte,prot,t1 |
| 1427 1428 iitlbt pte,prot 1429 1430 tlb_unlock1 spc,t0 1431 rfir 1432 nop 1433 1434naitlb_check_alias_20w: --- 69 unchanged lines hidden (view full) --- 1504 1505 space_check spc,t0,itlb_fault 1506 1507 L2_ptep ptp,pte,t0,va,itlb_fault 1508 1509 tlb_lock spc,ptp,pte,t0,t1,itlb_fault 1510 update_accessed ptp,pte,t0,t1 1511 | 1444 1445 iitlbt pte,prot 1446 1447 tlb_unlock1 spc,t0 1448 rfir 1449 nop 1450 1451naitlb_check_alias_20w: --- 69 unchanged lines hidden (view full) --- 1521 1522 space_check spc,t0,itlb_fault 1523 1524 L2_ptep ptp,pte,t0,va,itlb_fault 1525 1526 tlb_lock spc,ptp,pte,t0,t1,itlb_fault 1527 update_accessed ptp,pte,t0,t1 1528 |
| 1512 make_insert_tlb spc,pte,prot | 1529 make_insert_tlb spc,pte,prot,t1 |
| 1513 1514 f_extend pte,t1 1515 1516 iitlbt pte,prot 1517 1518 tlb_unlock1 spc,t0 1519 rfir 1520 nop 1521 1522naitlb_miss_20: 1523 get_pgd spc,ptp 1524 1525 space_check spc,t0,naitlb_fault 1526 1527 L2_ptep ptp,pte,t0,va,naitlb_check_alias_20 1528 1529 tlb_lock spc,ptp,pte,t0,t1,naitlb_check_alias_20 1530 update_accessed ptp,pte,t0,t1 1531 | 1530 1531 f_extend pte,t1 1532 1533 iitlbt pte,prot 1534 1535 tlb_unlock1 spc,t0 1536 rfir 1537 nop 1538 1539naitlb_miss_20: 1540 get_pgd spc,ptp 1541 1542 space_check spc,t0,naitlb_fault 1543 1544 L2_ptep ptp,pte,t0,va,naitlb_check_alias_20 1545 1546 tlb_lock spc,ptp,pte,t0,t1,naitlb_check_alias_20 1547 update_accessed ptp,pte,t0,t1 1548 |
| 1532 make_insert_tlb spc,pte,prot | 1549 make_insert_tlb spc,pte,prot,t1 |
| 1533 1534 f_extend pte,t1 1535 1536 iitlbt pte,prot 1537 1538 tlb_unlock1 spc,t0 1539 rfir 1540 nop --- 15 unchanged lines hidden (view full) --- 1556 get_pgd spc,ptp 1557 space_check spc,t0,dbit_fault 1558 1559 L3_ptep ptp,pte,t0,va,dbit_fault 1560 1561 tlb_lock spc,ptp,pte,t0,t1,dbit_fault 1562 update_dirty ptp,pte,t1 1563 | 1550 1551 f_extend pte,t1 1552 1553 iitlbt pte,prot 1554 1555 tlb_unlock1 spc,t0 1556 rfir 1557 nop --- 15 unchanged lines hidden (view full) --- 1573 get_pgd spc,ptp 1574 space_check spc,t0,dbit_fault 1575 1576 L3_ptep ptp,pte,t0,va,dbit_fault 1577 1578 tlb_lock spc,ptp,pte,t0,t1,dbit_fault 1579 update_dirty ptp,pte,t1 1580 |
| 1564 make_insert_tlb spc,pte,prot | 1581 make_insert_tlb spc,pte,prot,t1 |
| 1565 1566 idtlbt pte,prot 1567 1568 tlb_unlock0 spc,t0 1569 rfir 1570 nop 1571#else 1572 --- 27 unchanged lines hidden (view full) --- 1600 1601 space_check spc,t0,dbit_fault 1602 1603 L2_ptep ptp,pte,t0,va,dbit_fault 1604 1605 tlb_lock spc,ptp,pte,t0,t1,dbit_fault 1606 update_dirty ptp,pte,t1 1607 | 1582 1583 idtlbt pte,prot 1584 1585 tlb_unlock0 spc,t0 1586 rfir 1587 nop 1588#else 1589 --- 27 unchanged lines hidden (view full) --- 1617 1618 space_check spc,t0,dbit_fault 1619 1620 L2_ptep ptp,pte,t0,va,dbit_fault 1621 1622 tlb_lock spc,ptp,pte,t0,t1,dbit_fault 1623 update_dirty ptp,pte,t1 1624 |
| 1608 make_insert_tlb spc,pte,prot | 1625 make_insert_tlb spc,pte,prot,t1 |
| 1609 1610 f_extend pte,t1 1611 1612 idtlbt pte,prot 1613 1614 tlb_unlock0 spc,t0 1615 rfir 1616 nop --- 572 unchanged lines hidden --- | 1626 1627 f_extend pte,t1 1628 1629 idtlbt pte,prot 1630 1631 tlb_unlock0 spc,t0 1632 rfir 1633 nop --- 572 unchanged lines hidden --- |