cache.h (a23e1966932464e1c5226cb9ac4ce1d5fc10ba22) | cache.h (7ae04ba36b381bffe2471eff3a93edced843240f) |
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1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * include/asm-parisc/cache.h 4 */ 5 6#ifndef __ARCH_PARISC_CACHE_H 7#define __ARCH_PARISC_CACHE_H 8 --- 6 unchanged lines hidden (view full) --- 15 */ 16#define L1_CACHE_BYTES 16 17#define L1_CACHE_SHIFT 4 18 19#ifndef __ASSEMBLY__ 20 21#define SMP_CACHE_BYTES L1_CACHE_BYTES 22 | 1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * include/asm-parisc/cache.h 4 */ 5 6#ifndef __ARCH_PARISC_CACHE_H 7#define __ARCH_PARISC_CACHE_H 8 --- 6 unchanged lines hidden (view full) --- 15 */ 16#define L1_CACHE_BYTES 16 17#define L1_CACHE_SHIFT 4 18 19#ifndef __ASSEMBLY__ 20 21#define SMP_CACHE_BYTES L1_CACHE_BYTES 22 |
23#define ARCH_DMA_MINALIGN L1_CACHE_BYTES | 23#ifdef CONFIG_PA20 24#define ARCH_DMA_MINALIGN 128 25#else 26#define ARCH_DMA_MINALIGN 32 27#endif 28#define ARCH_KMALLOC_MINALIGN 16 /* ldcw requires 16-byte alignment */ |
24 | 29 |
30#define arch_slab_minalign() ((unsigned)dcache_stride) 31#define cache_line_size() dcache_stride 32#define dma_get_cache_alignment cache_line_size 33 |
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25#define __read_mostly __section(".data..read_mostly") 26 27void parisc_cache_init(void); /* initializes cache-flushing */ 28void disable_sr_hashing_asm(int); /* low level support for above */ 29void disable_sr_hashing(void); /* turns off space register hashing */ 30void free_sid(unsigned long); 31unsigned long alloc_sid(void); 32 --- 36 unchanged lines hidden --- | 34#define __read_mostly __section(".data..read_mostly") 35 36void parisc_cache_init(void); /* initializes cache-flushing */ 37void disable_sr_hashing_asm(int); /* low level support for above */ 38void disable_sr_hashing(void); /* turns off space register hashing */ 39void free_sid(unsigned long); 40unsigned long alloc_sid(void); 41 --- 36 unchanged lines hidden --- |