| Kconfig (2fc8483fdcde767795402a38a53e647811dc9abf) | Kconfig (6e5c8f5f66020077486d88003f0a5371462e2585) |
|---|---|
| 1config NIOS2 2 def_bool y 3 select ARCH_WANT_OPTIONAL_GPIOLIB 4 select CLKSRC_OF 5 select GENERIC_ATOMIC64 6 select GENERIC_CLOCKEVENTS 7 select GENERIC_CPU_DEVICES 8 select GENERIC_IRQ_PROBE --- 65 unchanged lines hidden (view full) --- 74 75source "arch/nios2/platform/Kconfig.platform" 76 77menu "Processor type and features" 78 79config MMU 80 def_bool y 81 | 1config NIOS2 2 def_bool y 3 select ARCH_WANT_OPTIONAL_GPIOLIB 4 select CLKSRC_OF 5 select GENERIC_ATOMIC64 6 select GENERIC_CLOCKEVENTS 7 select GENERIC_CPU_DEVICES 8 select GENERIC_IRQ_PROBE --- 65 unchanged lines hidden (view full) --- 74 75source "arch/nios2/platform/Kconfig.platform" 76 77menu "Processor type and features" 78 79config MMU 80 def_bool y 81 |
| 82config NR_CPUS 83 int 84 default "1" 85 |
|
| 82config NIOS2_ALIGNMENT_TRAP 83 bool "Catch alignment trap" 84 default y 85 help 86 Nios II CPUs cannot fetch/store data which is not bus aligned, 87 i.e., a 2 or 4 byte fetch must start at an address divisible by 88 2 or 4. Any non-aligned load/store instructions will be trapped and 89 emulated in software if you say Y here, which has a performance --- 112 unchanged lines hidden --- | 86config NIOS2_ALIGNMENT_TRAP 87 bool "Catch alignment trap" 88 default y 89 help 90 Nios II CPUs cannot fetch/store data which is not bus aligned, 91 i.e., a 2 or 4 byte fetch must start at an address divisible by 92 2 or 4. Any non-aligned load/store instructions will be trapped and 93 emulated in software if you say Y here, which has a performance --- 112 unchanged lines hidden --- |