irq.c (89d63fe179520b11f54de1f26755b7444c79e73a) irq.c (edcaf1a6a77315562e9781245cc8e028c9a921dc)
1/*
2 * Toshiba RBTX4927 specific interrupt handlers
3 *
4 * Author: MontaVista Software, Inc.
5 * source@mvista.com
6 *
7 * Copyright 2001-2002 MontaVista Software Inc.
8 *

--- 97 unchanged lines hidden (view full) ---

106SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported)
107JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6
108*/
109
110#include <linux/init.h>
111#include <linux/types.h>
112#include <linux/interrupt.h>
113#include <asm/io.h>
1/*
2 * Toshiba RBTX4927 specific interrupt handlers
3 *
4 * Author: MontaVista Software, Inc.
5 * source@mvista.com
6 *
7 * Copyright 2001-2002 MontaVista Software Inc.
8 *

--- 97 unchanged lines hidden (view full) ---

106SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported)
107JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6
108*/
109
110#include <linux/init.h>
111#include <linux/types.h>
112#include <linux/interrupt.h>
113#include <asm/io.h>
114#include <asm/mipsregs.h>
115#include <asm/txx9/generic.h>
114#include <asm/txx9/rbtx4927.h>
115
116#include <asm/txx9/rbtx4927.h>
117
116#define TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG 0
117#define TOSHIBA_RBTX4927_IRQ_IOC_RAW_END 7
118
119#define TOSHIBA_RBTX4927_IRQ_IOC_BEG ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG) /* 56 */
120#define TOSHIBA_RBTX4927_IRQ_IOC_END ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_END) /* 63 */
121
122#define TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC TX4927_IRQ_NEST_EXT_ON_PIC
123#define TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC (TOSHIBA_RBTX4927_IRQ_IOC_BEG+2)
124
125static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
126static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
127
128#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
129static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
130 .name = TOSHIBA_RBTX4927_IOC_NAME,
131 .ack = toshiba_rbtx4927_irq_ioc_disable,
132 .mask = toshiba_rbtx4927_irq_ioc_disable,
133 .mask_ack = toshiba_rbtx4927_irq_ioc_disable,
134 .unmask = toshiba_rbtx4927_irq_ioc_enable,
135};
136#define TOSHIBA_RBTX4927_IOC_INTR_ENAB (void __iomem *)0xbc002000UL
137#define TOSHIBA_RBTX4927_IOC_INTR_STAT (void __iomem *)0xbc002006UL
138
118static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
119static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
120
121#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
122static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
123 .name = TOSHIBA_RBTX4927_IOC_NAME,
124 .ack = toshiba_rbtx4927_irq_ioc_disable,
125 .mask = toshiba_rbtx4927_irq_ioc_disable,
126 .mask_ack = toshiba_rbtx4927_irq_ioc_disable,
127 .unmask = toshiba_rbtx4927_irq_ioc_enable,
128};
129#define TOSHIBA_RBTX4927_IOC_INTR_ENAB (void __iomem *)0xbc002000UL
130#define TOSHIBA_RBTX4927_IOC_INTR_STAT (void __iomem *)0xbc002006UL
131
139int toshiba_rbtx4927_irq_nested(int sw_irq)
132static int toshiba_rbtx4927_irq_nested(int sw_irq)
140{
141 u8 level3;
142
143 level3 = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
144 if (level3)
133{
134 u8 level3;
135
136 level3 = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
137 if (level3)
145 sw_irq = TOSHIBA_RBTX4927_IRQ_IOC_BEG + fls(level3) - 1;
138 sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1;
146 return (sw_irq);
147}
148
139 return (sw_irq);
140}
141
149static struct irqaction toshiba_rbtx4927_irq_ioc_action = {
150 .handler = no_action,
151 .flags = IRQF_SHARED,
152 .mask = CPU_MASK_NONE,
153 .name = TOSHIBA_RBTX4927_IOC_NAME
154};
155
156static void __init toshiba_rbtx4927_irq_ioc_init(void)
157{
158 int i;
159
142static void __init toshiba_rbtx4927_irq_ioc_init(void)
143{
144 int i;
145
160 for (i = TOSHIBA_RBTX4927_IRQ_IOC_BEG;
161 i <= TOSHIBA_RBTX4927_IRQ_IOC_END; i++)
146 for (i = RBTX4927_IRQ_IOC;
147 i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++)
162 set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
163 handle_level_irq);
148 set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
149 handle_level_irq);
164
165 setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC,
166 &toshiba_rbtx4927_irq_ioc_action);
150 set_irq_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq);
167}
168
169static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
170{
171 unsigned char v;
172
173 v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
151}
152
153static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
154{
155 unsigned char v;
156
157 v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
174 v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
158 v |= (1 << (irq - RBTX4927_IRQ_IOC));
175 writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
176}
177
178static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
179{
180 unsigned char v;
181
182 v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
159 writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
160}
161
162static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
163{
164 unsigned char v;
165
166 v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
183 v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
167 v &= ~(1 << (irq - RBTX4927_IRQ_IOC));
184 writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
185 mmiowb();
186}
187
168 writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
169 mmiowb();
170}
171
188void __init arch_init_irq(void)
172
173static int rbtx4927_irq_dispatch(int pending)
189{
174{
190 extern void tx4927_irq_init(void);
175 int irq;
191
176
177 if (pending & STATUSF_IP7) /* cpu timer */
178 irq = MIPS_CPU_IRQ_BASE + 7;
179 else if (pending & STATUSF_IP2) { /* tx4927 pic */
180 irq = txx9_irq();
181 if (irq == RBTX4927_IRQ_IOCINT)
182 irq = toshiba_rbtx4927_irq_nested(irq);
183 } else if (pending & STATUSF_IP0) /* user line 0 */
184 irq = MIPS_CPU_IRQ_BASE + 0;
185 else if (pending & STATUSF_IP1) /* user line 1 */
186 irq = MIPS_CPU_IRQ_BASE + 1;
187 else
188 irq = -1;
189 return irq;
190}
191
192void __init rbtx4927_irq_setup(void)
193{
194 txx9_irq_dispatch = rbtx4927_irq_dispatch;
192 tx4927_irq_init();
193 toshiba_rbtx4927_irq_ioc_init();
194 /* Onboard 10M Ether: High Active */
195 set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH);
196}
195 tx4927_irq_init();
196 toshiba_rbtx4927_irq_ioc_init();
197 /* Onboard 10M Ether: High Active */
198 set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH);
199}