pcit.c (48a7afe314bfc4d7f50e1608632f503dbba7e013) pcit.c (06cf5583fd9ac782cf34996cdabb48afdf478e37)
1/*
2 * PCI Tower specific code
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2006 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
9 */
10
11#include <linux/init.h>
12#include <linux/interrupt.h>
13#include <linux/pci.h>
14#include <linux/serial_8250.h>
15
1/*
2 * PCI Tower specific code
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2006 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
9 */
10
11#include <linux/init.h>
12#include <linux/interrupt.h>
13#include <linux/pci.h>
14#include <linux/serial_8250.h>
15
16#include <asm/mc146818-time.h>
17#include <asm/sni.h>
18#include <asm/time.h>
19#include <asm/irq_cpu.h>
20
21
22#define PORT(_base,_irq) \
23 { \
24 .iobase = _base, \

--- 28 unchanged lines hidden (view full) ---

53static struct platform_device pcit_cplus_serial8250_device = {
54 .name = "serial8250",
55 .id = PLAT8250_DEV_PLATFORM,
56 .dev = {
57 .platform_data = pcit_cplus_data,
58 },
59};
60
16#include <asm/sni.h>
17#include <asm/time.h>
18#include <asm/irq_cpu.h>
19
20
21#define PORT(_base,_irq) \
22 { \
23 .iobase = _base, \

--- 28 unchanged lines hidden (view full) ---

52static struct platform_device pcit_cplus_serial8250_device = {
53 .name = "serial8250",
54 .id = PLAT8250_DEV_PLATFORM,
55 .dev = {
56 .platform_data = pcit_cplus_data,
57 },
58};
59
60static struct resource pcit_cmos_rsrc[] = {
61 {
62 .start = 0x70,
63 .end = 0x71,
64 .flags = IORESOURCE_IO
65 },
66 {
67 .start = 8,
68 .end = 8,
69 .flags = IORESOURCE_IRQ
70 }
71};
72
73static struct platform_device pcit_cmos_device = {
74 .name = "rtc_cmos",
75 .num_resources = ARRAY_SIZE(pcit_cmos_rsrc),
76 .resource = pcit_cmos_rsrc
77};
78
61static struct resource sni_io_resource = {
62 .start = 0x00000000UL,
63 .end = 0x03bfffffUL,
64 .name = "PCIT IO",
65 .flags = IORESOURCE_IO,
66};
67
68static struct resource pcit_io_resources[] = {

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238 for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++)
239 set_irq_chip(i, &pcit_irq_type);
240 *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000;
241 sni_hwint = sni_pcit_hwint_cplus;
242 change_c0_status(ST0_IM, IE_IRQ0);
243 setup_irq (MIPS_CPU_IRQ_BASE + 3, &sni_isa_irq);
244}
245
79static struct resource sni_io_resource = {
80 .start = 0x00000000UL,
81 .end = 0x03bfffffUL,
82 .name = "PCIT IO",
83 .flags = IORESOURCE_IO,
84};
85
86static struct resource pcit_io_resources[] = {

--- 169 unchanged lines hidden (view full) ---

256 for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++)
257 set_irq_chip(i, &pcit_irq_type);
258 *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000;
259 sni_hwint = sni_pcit_hwint_cplus;
260 change_c0_status(ST0_IM, IE_IRQ0);
261 setup_irq (MIPS_CPU_IRQ_BASE + 3, &sni_isa_irq);
262}
263
246void sni_pcit_init(void)
264void __init sni_pcit_init(void)
247{
265{
248 rtc_mips_get_time = mc146818_get_cmos_time;
249 rtc_mips_set_time = mc146818_set_rtc_mmss;
250 board_time_init = sni_cpu_time_init;
251 ioport_resource.end = sni_io_resource.end;
252#ifdef CONFIG_PCI
253 PCIBIOS_MIN_IO = 0x9000;
254 register_pci_controller(&sni_pcit_controller);
255#endif
256 sni_pcit_resource_init();
257}
258
259static int __init snirm_pcit_setup_devinit(void)
260{
261 switch (sni_brd_type) {
262 case SNI_BRD_PCI_TOWER:
263 platform_device_register(&pcit_serial8250_device);
266 board_time_init = sni_cpu_time_init;
267 ioport_resource.end = sni_io_resource.end;
268#ifdef CONFIG_PCI
269 PCIBIOS_MIN_IO = 0x9000;
270 register_pci_controller(&sni_pcit_controller);
271#endif
272 sni_pcit_resource_init();
273}
274
275static int __init snirm_pcit_setup_devinit(void)
276{
277 switch (sni_brd_type) {
278 case SNI_BRD_PCI_TOWER:
279 platform_device_register(&pcit_serial8250_device);
280 platform_device_register(&pcit_cmos_device);
264 break;
265
266 case SNI_BRD_PCI_TOWER_CPLUS:
267 platform_device_register(&pcit_cplus_serial8250_device);
281 break;
282
283 case SNI_BRD_PCI_TOWER_CPLUS:
284 platform_device_register(&pcit_cplus_serial8250_device);
285 platform_device_register(&pcit_cmos_device);
268 break;
269 }
270 return 0;
271}
272
273device_initcall(snirm_pcit_setup_devinit);
286 break;
287 }
288 return 0;
289}
290
291device_initcall(snirm_pcit_setup_devinit);