pcimt.c (dc315011312f04433e0fdd34b6a3dde4bfde1e48) pcimt.c (06cf5583fd9ac782cf34996cdabb48afdf478e37)
1/*
2 * PCIMT specific code
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1996, 97, 98, 2000, 03, 04, 06 Ralf Baechle (ralf@linux-mips.org)
9 * Copyright (C) 2006,2007 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
10 */
11
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/pci.h>
15#include <linux/serial_8250.h>
16
1/*
2 * PCIMT specific code
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1996, 97, 98, 2000, 03, 04, 06 Ralf Baechle (ralf@linux-mips.org)
9 * Copyright (C) 2006,2007 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
10 */
11
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/pci.h>
15#include <linux/serial_8250.h>
16
17#include <asm/mc146818-time.h>
18#include <asm/sni.h>
19#include <asm/time.h>
20#include <asm/i8259.h>
21#include <asm/irq_cpu.h>
22
23#define cacheconf (*(volatile unsigned int *)PCIMT_CACHECONF)
24#define invspace (*(volatile unsigned int *)PCIMT_INVSPACE)
25

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85static struct platform_device pcimt_serial8250_device = {
86 .name = "serial8250",
87 .id = PLAT8250_DEV_PLATFORM,
88 .dev = {
89 .platform_data = pcimt_data,
90 },
91};
92
17#include <asm/sni.h>
18#include <asm/time.h>
19#include <asm/i8259.h>
20#include <asm/irq_cpu.h>
21
22#define cacheconf (*(volatile unsigned int *)PCIMT_CACHECONF)
23#define invspace (*(volatile unsigned int *)PCIMT_INVSPACE)
24

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84static struct platform_device pcimt_serial8250_device = {
85 .name = "serial8250",
86 .id = PLAT8250_DEV_PLATFORM,
87 .dev = {
88 .platform_data = pcimt_data,
89 },
90};
91
92static struct resource pcimt_cmos_rsrc[] = {
93 {
94 .start = 0x70,
95 .end = 0x71,
96 .flags = IORESOURCE_IO
97 },
98 {
99 .start = 8,
100 .end = 8,
101 .flags = IORESOURCE_IRQ
102 }
103};
104
105static struct platform_device pcimt_cmos_device = {
106 .name = "rtc_cmos",
107 .num_resources = ARRAY_SIZE(pcimt_cmos_rsrc),
108 .resource = pcimt_cmos_rsrc
109};
110
111
93static struct resource sni_io_resource = {
94 .start = 0x00000000UL,
95 .end = 0x03bfffffUL,
96 .name = "PCIMT IO MEM",
97 .flags = IORESOURCE_IO,
98};
99
100static struct resource pcimt_io_resources[] = {

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285 mips_cpu_irq_init();
286 /* Actually we've got more interrupts to handle ... */
287 for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_SCSI; i++)
288 set_irq_chip(i, &pcimt_irq_type);
289 sni_hwint = sni_pcimt_hwint;
290 change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ3);
291}
292
112static struct resource sni_io_resource = {
113 .start = 0x00000000UL,
114 .end = 0x03bfffffUL,
115 .name = "PCIMT IO MEM",
116 .flags = IORESOURCE_IO,
117};
118
119static struct resource pcimt_io_resources[] = {

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304 mips_cpu_irq_init();
305 /* Actually we've got more interrupts to handle ... */
306 for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_SCSI; i++)
307 set_irq_chip(i, &pcimt_irq_type);
308 sni_hwint = sni_pcimt_hwint;
309 change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ3);
310}
311
293void sni_pcimt_init(void)
312void __init sni_pcimt_init(void)
294{
295 sni_pcimt_detect();
296 sni_pcimt_sc_init();
313{
314 sni_pcimt_detect();
315 sni_pcimt_sc_init();
297 rtc_mips_get_time = mc146818_get_cmos_time;
298 rtc_mips_set_time = mc146818_set_rtc_mmss;
299 board_time_init = sni_cpu_time_init;
300 ioport_resource.end = sni_io_resource.end;
301#ifdef CONFIG_PCI
302 PCIBIOS_MIN_IO = 0x9000;
303 register_pci_controller(&sni_controller);
304#endif
305 sni_pcimt_resource_init();
306}
307
308static int __init snirm_pcimt_setup_devinit(void)
309{
310 switch (sni_brd_type) {
311 case SNI_BRD_PCI_MTOWER:
312 case SNI_BRD_PCI_DESKTOP:
313 case SNI_BRD_PCI_MTOWER_CPLUS:
314 platform_device_register(&pcimt_serial8250_device);
316 board_time_init = sni_cpu_time_init;
317 ioport_resource.end = sni_io_resource.end;
318#ifdef CONFIG_PCI
319 PCIBIOS_MIN_IO = 0x9000;
320 register_pci_controller(&sni_controller);
321#endif
322 sni_pcimt_resource_init();
323}
324
325static int __init snirm_pcimt_setup_devinit(void)
326{
327 switch (sni_brd_type) {
328 case SNI_BRD_PCI_MTOWER:
329 case SNI_BRD_PCI_DESKTOP:
330 case SNI_BRD_PCI_MTOWER_CPLUS:
331 platform_device_register(&pcimt_serial8250_device);
332 platform_device_register(&pcimt_cmos_device);
315 break;
316 }
317
318 return 0;
319}
320
321device_initcall(snirm_pcimt_setup_devinit);
333 break;
334 }
335
336 return 0;
337}
338
339device_initcall(snirm_pcimt_setup_devinit);