fixup-cobalt.c (39fe5434cb9de5da40510028b17b96bc4eb312b3) fixup-cobalt.c (d5ab1a6910fe850fa092888f210cf6c43136a7ab)
1/*
2 * Cobalt Qube/Raq PCI support
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1995, 1996, 1997, 2002, 2003 by Ralf Baechle

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13#include <linux/kernel.h>
14#include <linux/init.h>
15
16#include <asm/pci.h>
17#include <asm/io.h>
18#include <asm/gt64120.h>
19
20#include <cobalt.h>
1/*
2 * Cobalt Qube/Raq PCI support
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1995, 1996, 1997, 2002, 2003 by Ralf Baechle

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13#include <linux/kernel.h>
14#include <linux/init.h>
15
16#include <asm/pci.h>
17#include <asm/io.h>
18#include <asm/gt64120.h>
19
20#include <cobalt.h>
21#include <irq.h>
21
22static void qube_raq_galileo_early_fixup(struct pci_dev *dev)
23{
24 if (dev->devfn == PCI_DEVFN(0, 0) &&
25 (dev->class >> 8) == PCI_CLASS_MEMORY_OTHER) {
26
27 dev->class = (PCI_CLASS_BRIDGE_HOST << 8) | (dev->class & 0xff);
28

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127 printk(KERN_INFO "Cobalt board ID: %d\n", cobalt_board_id);
128}
129
130DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_0,
131 qube_raq_via_board_id_fixup);
132
133static char irq_tab_qube1[] __initdata = {
134 [COBALT_PCICONF_CPU] = 0,
22
23static void qube_raq_galileo_early_fixup(struct pci_dev *dev)
24{
25 if (dev->devfn == PCI_DEVFN(0, 0) &&
26 (dev->class >> 8) == PCI_CLASS_MEMORY_OTHER) {
27
28 dev->class = (PCI_CLASS_BRIDGE_HOST << 8) | (dev->class & 0xff);
29

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128 printk(KERN_INFO "Cobalt board ID: %d\n", cobalt_board_id);
129}
130
131DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_0,
132 qube_raq_via_board_id_fixup);
133
134static char irq_tab_qube1[] __initdata = {
135 [COBALT_PCICONF_CPU] = 0,
135 [COBALT_PCICONF_ETH0] = COBALT_QUBE1_ETH0_IRQ,
136 [COBALT_PCICONF_RAQSCSI] = COBALT_SCSI_IRQ,
136 [COBALT_PCICONF_ETH0] = QUBE1_ETH0_IRQ,
137 [COBALT_PCICONF_RAQSCSI] = SCSI_IRQ,
137 [COBALT_PCICONF_VIA] = 0,
138 [COBALT_PCICONF_VIA] = 0,
138 [COBALT_PCICONF_PCISLOT] = COBALT_QUBE_SLOT_IRQ,
139 [COBALT_PCICONF_PCISLOT] = PCISLOT_IRQ,
139 [COBALT_PCICONF_ETH1] = 0
140};
141
142static char irq_tab_cobalt[] __initdata = {
143 [COBALT_PCICONF_CPU] = 0,
140 [COBALT_PCICONF_ETH1] = 0
141};
142
143static char irq_tab_cobalt[] __initdata = {
144 [COBALT_PCICONF_CPU] = 0,
144 [COBALT_PCICONF_ETH0] = COBALT_ETH0_IRQ,
145 [COBALT_PCICONF_RAQSCSI] = COBALT_SCSI_IRQ,
145 [COBALT_PCICONF_ETH0] = ETH0_IRQ,
146 [COBALT_PCICONF_RAQSCSI] = SCSI_IRQ,
146 [COBALT_PCICONF_VIA] = 0,
147 [COBALT_PCICONF_VIA] = 0,
147 [COBALT_PCICONF_PCISLOT] = COBALT_QUBE_SLOT_IRQ,
148 [COBALT_PCICONF_ETH1] = COBALT_ETH1_IRQ
148 [COBALT_PCICONF_PCISLOT] = PCISLOT_IRQ,
149 [COBALT_PCICONF_ETH1] = ETH1_IRQ
149};
150
151static char irq_tab_raq2[] __initdata = {
152 [COBALT_PCICONF_CPU] = 0,
150};
151
152static char irq_tab_raq2[] __initdata = {
153 [COBALT_PCICONF_CPU] = 0,
153 [COBALT_PCICONF_ETH0] = COBALT_ETH0_IRQ,
154 [COBALT_PCICONF_RAQSCSI] = COBALT_RAQ_SCSI_IRQ,
154 [COBALT_PCICONF_ETH0] = ETH0_IRQ,
155 [COBALT_PCICONF_RAQSCSI] = RAQ2_SCSI_IRQ,
155 [COBALT_PCICONF_VIA] = 0,
156 [COBALT_PCICONF_VIA] = 0,
156 [COBALT_PCICONF_PCISLOT] = COBALT_QUBE_SLOT_IRQ,
157 [COBALT_PCICONF_ETH1] = COBALT_ETH1_IRQ
157 [COBALT_PCICONF_PCISLOT] = PCISLOT_IRQ,
158 [COBALT_PCICONF_ETH1] = ETH1_IRQ
158};
159
160int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
161{
162 if (cobalt_board_id < COBALT_BRD_ID_QUBE2)
163 return irq_tab_qube1[slot];
164
165 if (cobalt_board_id == COBALT_BRD_ID_RAQ2)
166 return irq_tab_raq2[slot];
167
168 return irq_tab_cobalt[slot];
169}
170
171/* Do platform specific device initialization at pci_enable_device() time */
172int pcibios_plat_dev_init(struct pci_dev *dev)
173{
174 return 0;
175}
159};
160
161int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
162{
163 if (cobalt_board_id < COBALT_BRD_ID_QUBE2)
164 return irq_tab_qube1[slot];
165
166 if (cobalt_board_id == COBALT_BRD_ID_RAQ2)
167 return irq_tab_raq2[slot];
168
169 return irq_tab_cobalt[slot];
170}
171
172/* Do platform specific device initialization at pci_enable_device() time */
173int pcibios_plat_dev_init(struct pci_dev *dev)
174{
175 return 0;
176}