cp1emu.c (e23c34bb41da65f354fb7eee04300c56ee48f60c) cp1emu.c (1ac944007bede6d6f934831959b0e2b65c82d291)
1/*
2 * cp1emu.c: a MIPS coprocessor 1 (fpu) instruction emulator
3 *
4 * MIPS floating point support
5 * Copyright (C) 1994-2000 Algorithmics Ltd.
6 *
7 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
8 * Copyright (C) 2000 MIPS Technologies, Inc.

--- 864 unchanged lines hidden (view full) ---

873#define SIFROMREG(si, x) ((si) = cop1_64bit(xcp) || !(x & 1) ? \
874 (int)ctx->fpr[x] : (int)(ctx->fpr[x & ~1] >> 32))
875
876#define SITOREG(si, x) (ctx->fpr[x & ~(cop1_64bit(xcp) == 0)] = \
877 cop1_64bit(xcp) || !(x & 1) ? \
878 ctx->fpr[x & ~1] >> 32 << 32 | (u32)(si) : \
879 ctx->fpr[x & ~1] << 32 >> 32 | (u64)(si) << 32)
880
1/*
2 * cp1emu.c: a MIPS coprocessor 1 (fpu) instruction emulator
3 *
4 * MIPS floating point support
5 * Copyright (C) 1994-2000 Algorithmics Ltd.
6 *
7 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
8 * Copyright (C) 2000 MIPS Technologies, Inc.

--- 864 unchanged lines hidden (view full) ---

873#define SIFROMREG(si, x) ((si) = cop1_64bit(xcp) || !(x & 1) ? \
874 (int)ctx->fpr[x] : (int)(ctx->fpr[x & ~1] >> 32))
875
876#define SITOREG(si, x) (ctx->fpr[x & ~(cop1_64bit(xcp) == 0)] = \
877 cop1_64bit(xcp) || !(x & 1) ? \
878 ctx->fpr[x & ~1] >> 32 << 32 | (u32)(si) : \
879 ctx->fpr[x & ~1] << 32 >> 32 | (u64)(si) << 32)
880
881#define SIFROMHREG(si, x) ((si) = (int)(ctx->fpr[x] >> 32))
882#define SITOHREG(si, x) (ctx->fpr[x] = \
883 ctx->fpr[x] << 32 >> 32 | (u64)(si) << 32)
884
881#define DIFROMREG(di, x) ((di) = ctx->fpr[x & ~(cop1_64bit(xcp) == 0)])
882#define DITOREG(di, x) (ctx->fpr[x & ~(cop1_64bit(xcp) == 0)] = (di))
883
884#define SPFROMREG(sp, x) SIFROMREG((sp).bits, x)
885#define SPTOREG(sp, x) SITOREG((sp).bits, x)
886#define DPFROMREG(dp, x) DIFROMREG((dp).bits, x)
887#define DPTOREG(dp, x) DITOREG((dp).bits, x)
888

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1050 break;
1051
1052 case dmtc_op:
1053 /* copregister fs <- rt */
1054 DITOREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir));
1055 break;
1056#endif
1057
885#define DIFROMREG(di, x) ((di) = ctx->fpr[x & ~(cop1_64bit(xcp) == 0)])
886#define DITOREG(di, x) (ctx->fpr[x & ~(cop1_64bit(xcp) == 0)] = (di))
887
888#define SPFROMREG(sp, x) SIFROMREG((sp).bits, x)
889#define SPTOREG(sp, x) SITOREG((sp).bits, x)
890#define DPFROMREG(dp, x) DIFROMREG((dp).bits, x)
891#define DPTOREG(dp, x) DITOREG((dp).bits, x)
892

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1054 break;
1055
1056 case dmtc_op:
1057 /* copregister fs <- rt */
1058 DITOREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir));
1059 break;
1060#endif
1061
1062 case mfhc_op:
1063 if (!cpu_has_mips_r2)
1064 goto sigill;
1065
1066 /* copregister rd -> gpr[rt] */
1067 if (MIPSInst_RT(ir) != 0) {
1068 SIFROMHREG(xcp->regs[MIPSInst_RT(ir)],
1069 MIPSInst_RD(ir));
1070 }
1071 break;
1072
1073 case mthc_op:
1074 if (!cpu_has_mips_r2)
1075 goto sigill;
1076
1077 /* copregister rd <- gpr[rt] */
1078 SITOHREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir));
1079 break;
1080
1058 case mfc_op:
1059 /* copregister rd -> gpr[rt] */
1060 if (MIPSInst_RT(ir) != 0) {
1061 SIFROMREG(xcp->regs[MIPSInst_RT(ir)],
1062 MIPSInst_RD(ir));
1063 }
1064 break;
1065

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1258 cond = fpucondbit[MIPSInst_RT(ir) >> 2];
1259 if (((ctx->fcr31 & cond) != 0) == ((MIPSInst_RT(ir) & 1) != 0))
1260 xcp->regs[MIPSInst_RD(ir)] =
1261 xcp->regs[MIPSInst_RS(ir)];
1262 break;
1263#endif
1264
1265 default:
1081 case mfc_op:
1082 /* copregister rd -> gpr[rt] */
1083 if (MIPSInst_RT(ir) != 0) {
1084 SIFROMREG(xcp->regs[MIPSInst_RT(ir)],
1085 MIPSInst_RD(ir));
1086 }
1087 break;
1088

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1281 cond = fpucondbit[MIPSInst_RT(ir) >> 2];
1282 if (((ctx->fcr31 & cond) != 0) == ((MIPSInst_RT(ir) & 1) != 0))
1283 xcp->regs[MIPSInst_RD(ir)] =
1284 xcp->regs[MIPSInst_RS(ir)];
1285 break;
1286#endif
1287
1288 default:
1289sigill:
1266 return SIGILL;
1267 }
1268
1269 /* we did it !! */
1270 xcp->cp0_epc = contpc;
1271 xcp->cp0_cause &= ~CAUSEF_BD;
1272
1273 return 0;

--- 883 unchanged lines hidden --- 		1290 return SIGILL;
1291 }
1292
1293 /* we did it !! */
1294 xcp->cp0_epc = contpc;
1295 xcp->cp0_cause &= ~CAUSEF_BD;
1296
1297 return 0;

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