cp1emu.c (b74b953b998bcc2db91b694446f3a2619ec32de6) cp1emu.c (7f788d2d53085815d474559cd51ef1f38b0a9bb8)
1/*
2 * cp1emu.c: a MIPS coprocessor 1 (fpu) instruction emulator
3 *
4 * MIPS floating point support
5 * Copyright (C) 1994-2000 Algorithmics Ltd.
1/*
2 * cp1emu.c: a MIPS coprocessor 1 (fpu) instruction emulator
3 *
4 * MIPS floating point support
5 * Copyright (C) 1994-2000 Algorithmics Ltd.
6 * http://www.algor.co.uk
7 *
8 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
9 * Copyright (C) 2000 MIPS Technologies, Inc.
10 *
11 * This program is free software; you can distribute it and/or modify it
12 * under the terms of the GNU General Public License (Version 2) as
13 * published by the Free Software Foundation.
14 *

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32 * required, e.g. in branch delay slots.
33 *
34 * Note if you know that you won't have an fpu, then you'll get much
35 * better performance by compiling with -msoft-float!
36 */
37#include <linux/sched.h>
38#include <linux/module.h>
39#include <linux/debugfs.h>
6 *
7 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
8 * Copyright (C) 2000 MIPS Technologies, Inc.
9 *
10 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation.
13 *

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31 * required, e.g. in branch delay slots.
32 *
33 * Note if you know that you won't have an fpu, then you'll get much
34 * better performance by compiling with -msoft-float!
35 */
36#include <linux/sched.h>
37#include <linux/module.h>
38#include <linux/debugfs.h>
39#include <linux/perf_event.h>
40
41#include <asm/inst.h>
42#include <asm/bootinfo.h>
43#include <asm/processor.h>
44#include <asm/ptrace.h>
45#include <asm/signal.h>
46#include <asm/mipsregs.h>
47#include <asm/fpu_emulator.h>

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254 /* In order not to confuse ptrace() et al, tweak context */
255 xcp->cp0_epc = emulpc - 4;
256 } else {
257 emulpc = xcp->cp0_epc;
258 contpc = xcp->cp0_epc + 4;
259 }
260
261 emul:
40
41#include <asm/inst.h>
42#include <asm/bootinfo.h>
43#include <asm/processor.h>
44#include <asm/ptrace.h>
45#include <asm/signal.h>
46#include <asm/mipsregs.h>
47#include <asm/fpu_emulator.h>

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254 /* In order not to confuse ptrace() et al, tweak context */
255 xcp->cp0_epc = emulpc - 4;
256 } else {
257 emulpc = xcp->cp0_epc;
258 contpc = xcp->cp0_epc + 4;
259 }
260
261 emul:
262 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS,
263 1, 0, xcp, 0);
262 MIPS_FPU_EMU_INC_STATS(emulated);
263 switch (MIPSInst_OPCODE(ir)) {
264 case ldc1_op:{
265 u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
266 MIPSInst_SIMM(ir));
267 u64 val;
268
269 MIPS_FPU_EMU_INC_STATS(loads);

--- 1068 unchanged lines hidden --- 		264 MIPS_FPU_EMU_INC_STATS(emulated);
265 switch (MIPSInst_OPCODE(ir)) {
266 case ldc1_op:{
267 u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
268 MIPSInst_SIMM(ir));
269 u64 val;
270
271 MIPS_FPU_EMU_INC_STATS(loads);

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