| cp1emu.c (67613f02788d73541c7c9b1c851061b8c223057b) | cp1emu.c (130fe357ee895421a4aefef7b1285bf52f295afe) |
|---|---|
| 1/* 2 * cp1emu.c: a MIPS coprocessor 1 (FPU) instruction emulator 3 * 4 * MIPS floating point support 5 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * 7 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com 8 * Copyright (C) 2000 MIPS Technologies, Inc. --- 1740 unchanged lines hidden (view full) --- 1749 1750 SPFROMREG(rv.s, MIPSInst_FT(ir)); 1751 if (rv.w & 0x1) 1752 rv.w = 0; 1753 else 1754 SPFROMREG(rv.s, MIPSInst_FS(ir)); 1755 break; 1756 | 1/* 2 * cp1emu.c: a MIPS coprocessor 1 (FPU) instruction emulator 3 * 4 * MIPS floating point support 5 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * 7 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com 8 * Copyright (C) 2000 MIPS Technologies, Inc. --- 1740 unchanged lines hidden (view full) --- 1749 1750 SPFROMREG(rv.s, MIPSInst_FT(ir)); 1751 if (rv.w & 0x1) 1752 rv.w = 0; 1753 else 1754 SPFROMREG(rv.s, MIPSInst_FS(ir)); 1755 break; 1756 |
| 1757 case fselnez_op: 1758 if (!cpu_has_mips_r6) 1759 return SIGILL; 1760 1761 SPFROMREG(rv.s, MIPSInst_FT(ir)); 1762 if (rv.w & 0x1) 1763 SPFROMREG(rv.s, MIPSInst_FS(ir)); 1764 else 1765 rv.w = 0; 1766 break; 1767 |
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| 1757 case fabs_op: 1758 handler.u = ieee754sp_abs; 1759 goto scopuop; 1760 1761 case fneg_op: 1762 handler.u = ieee754sp_neg; 1763 goto scopuop; 1764 --- 193 unchanged lines hidden (view full) --- 1958 1959 DPFROMREG(rv.d, MIPSInst_FT(ir)); 1960 if (rv.l & 0x1) 1961 rv.l = 0; 1962 else 1963 DPFROMREG(rv.d, MIPSInst_FS(ir)); 1964 break; 1965 | 1768 case fabs_op: 1769 handler.u = ieee754sp_abs; 1770 goto scopuop; 1771 1772 case fneg_op: 1773 handler.u = ieee754sp_neg; 1774 goto scopuop; 1775 --- 193 unchanged lines hidden (view full) --- 1969 1970 DPFROMREG(rv.d, MIPSInst_FT(ir)); 1971 if (rv.l & 0x1) 1972 rv.l = 0; 1973 else 1974 DPFROMREG(rv.d, MIPSInst_FS(ir)); 1975 break; 1976 |
| 1977 case fselnez_op: 1978 if (!cpu_has_mips_r6) 1979 return SIGILL; 1980 1981 DPFROMREG(rv.d, MIPSInst_FT(ir)); 1982 if (rv.l & 0x1) 1983 DPFROMREG(rv.d, MIPSInst_FS(ir)); 1984 else 1985 rv.l = 0; 1986 break; 1987 |
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| 1966 case fabs_op: 1967 handler.u = ieee754dp_abs; 1968 goto dcopuop; 1969 1970 case fneg_op: 1971 handler.u = ieee754dp_neg; 1972 goto dcopuop; 1973 --- 401 unchanged lines hidden --- | 1988 case fabs_op: 1989 handler.u = ieee754dp_abs; 1990 goto dcopuop; 1991 1992 case fneg_op: 1993 handler.u = ieee754dp_neg; 1994 goto dcopuop; 1995 --- 401 unchanged lines hidden --- |