cp1emu.c (552c69b36ebd966186573b9c7a286b390935cce1) cp1emu.c (1975ed43ce67542befed188f6aed6a82cfaffd0b)
1/*
2 * cp1emu.c: a MIPS coprocessor 1 (FPU) instruction emulator
3 *
4 * MIPS floating point support
5 * Copyright (C) 1994-2000 Algorithmics Ltd.
6 *
7 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
8 * Copyright (C) 2000 MIPS Technologies, Inc.

--- 2817 unchanged lines hidden (view full) ---

2826 int has_fpu, void __user **fault_addr)
2827{
2828 unsigned long oldepc, prevepc;
2829 struct mm_decoded_insn dec_insn;
2830 u16 instr[4];
2831 u16 *instr_ptr;
2832 int sig = 0;
2833
1/*
2 * cp1emu.c: a MIPS coprocessor 1 (FPU) instruction emulator
3 *
4 * MIPS floating point support
5 * Copyright (C) 1994-2000 Algorithmics Ltd.
6 *
7 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
8 * Copyright (C) 2000 MIPS Technologies, Inc.

--- 2817 unchanged lines hidden (view full) ---

2826 int has_fpu, void __user **fault_addr)
2827{
2828 unsigned long oldepc, prevepc;
2829 struct mm_decoded_insn dec_insn;
2830 u16 instr[4];
2831 u16 *instr_ptr;
2832 int sig = 0;
2833
2834 /*
2835 * Initialize context if it hasn't been used already, otherwise ensure
2836 * it has been saved to struct thread_struct.
2837 */
2838 if (!init_fp_ctx(current))
2839 lose_fpu(1);
2840
2834 oldepc = xcp->cp0_epc;
2835 do {
2836 prevepc = xcp->cp0_epc;
2837
2838 if (get_isa16_mode(prevepc) && cpu_has_mmips) {
2839 /*
2840 * Get next 2 microMIPS instructions and convert them
2841 * into 32-bit instructions.

--- 88 unchanged lines hidden --- 		2841 oldepc = xcp->cp0_epc;
2842 do {
2843 prevepc = xcp->cp0_epc;
2844
2845 if (get_isa16_mode(prevepc) && cpu_has_mmips) {
2846 /*
2847 * Get next 2 microMIPS instructions and convert them
2848 * into 32-bit instructions.

--- 88 unchanged lines hidden ---