tlb.c (e6207bbea16c60942cdc1492af4feed5aed77389) tlb.c (42aa12e74e91f790d239bfb852260d07573ce83f)
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * KVM/MIPS TLB handling, this file is part of the Linux host kernel so that
7 * TLB handlers run from KSEG0
8 *

--- 157 unchanged lines hidden (view full) ---

166 local_irq_restore(flags);
167 return 0;
168}
169EXPORT_SYMBOL_GPL(kvm_mips_host_tlb_write);
170
171int kvm_mips_handle_commpage_tlb_fault(unsigned long badvaddr,
172 struct kvm_vcpu *vcpu)
173{
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * KVM/MIPS TLB handling, this file is part of the Linux host kernel so that
7 * TLB handlers run from KSEG0
8 *

--- 157 unchanged lines hidden (view full) ---

166 local_irq_restore(flags);
167 return 0;
168}
169EXPORT_SYMBOL_GPL(kvm_mips_host_tlb_write);
170
171int kvm_mips_handle_commpage_tlb_fault(unsigned long badvaddr,
172 struct kvm_vcpu *vcpu)
173{
174 kvm_pfn_t pfn0, pfn1;
174 kvm_pfn_t pfn;
175 unsigned long flags, old_entryhi = 0, vaddr = 0;
175 unsigned long flags, old_entryhi = 0, vaddr = 0;
176 unsigned long entrylo0 = 0, entrylo1 = 0;
176 unsigned long entrylo[2] = { 0, 0 };
177 unsigned int pair_idx;
177
178
178 pfn0 = CPHYSADDR(vcpu->arch.kseg0_commpage) >> PAGE_SHIFT;
179 pfn1 = 0;
180 entrylo0 = mips3_paddr_to_tlbpfn(pfn0 << PAGE_SHIFT) |
181 (0x3 << ENTRYLO_C_SHIFT) | ENTRYLO_D | ENTRYLO_V;
182 entrylo1 = 0;
179 pfn = CPHYSADDR(vcpu->arch.kseg0_commpage) >> PAGE_SHIFT;
180 pair_idx = (badvaddr >> PAGE_SHIFT) & 1;
181 entrylo[pair_idx] = mips3_paddr_to_tlbpfn(pfn << PAGE_SHIFT) |
182 (0x3 << ENTRYLO_C_SHIFT) | ENTRYLO_D | ENTRYLO_V;
183
184 local_irq_save(flags);
185
186 old_entryhi = read_c0_entryhi();
187 vaddr = badvaddr & (PAGE_MASK << 1);
188 write_c0_entryhi(vaddr | kvm_mips_get_kernel_asid(vcpu));
183
184 local_irq_save(flags);
185
186 old_entryhi = read_c0_entryhi();
187 vaddr = badvaddr & (PAGE_MASK << 1);
188 write_c0_entryhi(vaddr | kvm_mips_get_kernel_asid(vcpu));
189 write_c0_entrylo0(entrylo0);
190 write_c0_entrylo1(entrylo1);
189 write_c0_entrylo0(entrylo[0]);
190 write_c0_entrylo1(entrylo[1]);
191 write_c0_index(kvm_mips_get_commpage_asid(vcpu));
192 mtc0_tlbw_hazard();
193 tlb_write_indexed();
194 tlbw_use_hazard();
195
196 kvm_debug("@ %#lx idx: %2d [entryhi(R): %#lx] entrylo0 (R): 0x%08lx, entrylo1(R): 0x%08lx\n",
197 vcpu->arch.pc, read_c0_index(), read_c0_entryhi(),
198 read_c0_entrylo0(), read_c0_entrylo1());

--- 183 unchanged lines hidden --- 		191 write_c0_index(kvm_mips_get_commpage_asid(vcpu));
192 mtc0_tlbw_hazard();
193 tlb_write_indexed();
194 tlbw_use_hazard();
195
196 kvm_debug("@ %#lx idx: %2d [entryhi(R): %#lx] entrylo0 (R): 0x%08lx, entrylo1(R): 0x%08lx\n",
197 vcpu->arch.pc, read_c0_index(), read_c0_entryhi(),
198 read_c0_entrylo0(), read_c0_entrylo1());

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