unaligned.c (b74b953b998bcc2db91b694446f3a2619ec32de6) unaligned.c (7f788d2d53085815d474559cd51ef1f38b0a9bb8)
1/*
2 * Handle unaligned accesses by emulation.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1996, 1998, 1999, 2002 by Ralf Baechle

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73 * Undo the partial store in this case.
74 */
75#include <linux/mm.h>
76#include <linux/module.h>
77#include <linux/signal.h>
78#include <linux/smp.h>
79#include <linux/sched.h>
80#include <linux/debugfs.h>
1/*
2 * Handle unaligned accesses by emulation.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1996, 1998, 1999, 2002 by Ralf Baechle

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73 * Undo the partial store in this case.
74 */
75#include <linux/mm.h>
76#include <linux/module.h>
77#include <linux/signal.h>
78#include <linux/smp.h>
79#include <linux/sched.h>
80#include <linux/debugfs.h>
81#include <linux/perf_event.h>
82
81#include <asm/asm.h>
82#include <asm/branch.h>
83#include <asm/byteorder.h>
84#include <asm/cop2.h>
85#include <asm/inst.h>
86#include <asm/uaccess.h>
87#include <asm/system.h>
88

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104
105static void emulate_load_store_insn(struct pt_regs *regs,
106 void __user *addr, unsigned int __user *pc)
107{
108 union mips_instruction insn;
109 unsigned long value;
110 unsigned int res;
111
83#include <asm/asm.h>
84#include <asm/branch.h>
85#include <asm/byteorder.h>
86#include <asm/cop2.h>
87#include <asm/inst.h>
88#include <asm/uaccess.h>
89#include <asm/system.h>
90

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106
107static void emulate_load_store_insn(struct pt_regs *regs,
108 void __user *addr, unsigned int __user *pc)
109{
110 union mips_instruction insn;
111 unsigned long value;
112 unsigned int res;
113
114 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS,
115 1, 0, regs, 0);
116
112 /*
113 * This load never faults.
114 */
115 __get_user(insn.word, pc);
116
117 switch (insn.i_format.opcode) {
118 /*
119 * These are instructions that a compiler doesn't generate. We

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506 force_sig(SIGILL, current);
507}
508
509asmlinkage void do_ade(struct pt_regs *regs)
510{
511 unsigned int __user *pc;
512 mm_segment_t seg;
513
117 /*
118 * This load never faults.
119 */
120 __get_user(insn.word, pc);
121
122 switch (insn.i_format.opcode) {
123 /*
124 * These are instructions that a compiler doesn't generate. We

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511 force_sig(SIGILL, current);
512}
513
514asmlinkage void do_ade(struct pt_regs *regs)
515{
516 unsigned int __user *pc;
517 mm_segment_t seg;
518
519 perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS,
520 1, 0, regs, regs->cp0_badvaddr);
514 /*
515 * Did we catch a fault trying to load an instruction?
516 * Or are we running in MIPS16 mode?
517 */
518 if ((regs->cp0_badvaddr == regs->cp0_epc) || (regs->cp0_epc & 0x1))
519 goto sigbus;
520
521 pc = (unsigned int __user *) exception_epc(regs);

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521 /*
522 * Did we catch a fault trying to load an instruction?
523 * Or are we running in MIPS16 mode?
524 */
525 if ((regs->cp0_badvaddr == regs->cp0_epc) || (regs->cp0_epc & 0x1))
526 goto sigbus;
527
528 pc = (unsigned int __user *) exception_epc(regs);

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