r2300_switch.S (4ba24fef3eb3b142197135223b90ced2f319cd53) r2300_switch.S (9b26616c8d9dae53fbac7f7cb2c6dd1308102976)
1/*
2 * r2300_switch.S: R2300 specific task switching code.
3 *
4 * Copyright (C) 1994, 1995, 1996, 1999 by Ralf Baechle
5 * Copyright (C) 1994, 1995, 1996 by Andreas Busse
6 *
7 * Multi-cpu abstraction and macros for easier reading:
8 * Copyright (C) 1996 David S. Miller (davem@davemloft.net)

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110 jr ra
111 END(_restore_fp)
112
113/*
114 * Load the FPU with signalling NANS. This bit pattern we're using has
115 * the property that no matter whether considered as single or as double
116 * precision represents signaling NANS.
117 *
1/*
2 * r2300_switch.S: R2300 specific task switching code.
3 *
4 * Copyright (C) 1994, 1995, 1996, 1999 by Ralf Baechle
5 * Copyright (C) 1994, 1995, 1996 by Andreas Busse
6 *
7 * Multi-cpu abstraction and macros for easier reading:
8 * Copyright (C) 1996 David S. Miller (davem@davemloft.net)

--- 101 unchanged lines hidden (view full) ---

110 jr ra
111 END(_restore_fp)
112
113/*
114 * Load the FPU with signalling NANS. This bit pattern we're using has
115 * the property that no matter whether considered as single or as double
116 * precision represents signaling NANS.
117 *
118 * We initialize fcr31 to rounding to nearest, no exceptions.
118 * The value to initialize fcr31 to comes in $a0.
119 */
120
119 */
120
121#define FPU_DEFAULT 0x00000000
122
123 .set push
124 SET_HARDFLOAT
125
126LEAF(_init_fpu)
127 mfc0 t0, CP0_STATUS
128 li t1, ST0_CU1
129 or t0, t1
130 mtc0 t0, CP0_STATUS
131
121 .set push
122 SET_HARDFLOAT
123
124LEAF(_init_fpu)
125 mfc0 t0, CP0_STATUS
126 li t1, ST0_CU1
127 or t0, t1
128 mtc0 t0, CP0_STATUS
129
132 li t1, FPU_DEFAULT
133 ctc1 t1, fcr31
130 ctc1 a0, fcr31
134
135 li t0, -1
136
137 mtc1 t0, $f0
138 mtc1 t0, $f1
139 mtc1 t0, $f2
140 mtc1 t0, $f3
141 mtc1 t0, $f4

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132 li t0, -1
133
134 mtc1 t0, $f0
135 mtc1 t0, $f1
136 mtc1 t0, $f2
137 mtc1 t0, $f3
138 mtc1 t0, $f4

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