ptrace.c (65844bb0a7861eefa3ce44cd788163ecc4e14f2d) ptrace.c (9b26616c8d9dae53fbac7f7cb2c6dd1308102976)
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1992 Ross Biro
7 * Copyright (C) Linus Torvalds
8 * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle

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27#include <linux/security.h>
28#include <linux/tracehook.h>
29#include <linux/audit.h>
30#include <linux/seccomp.h>
31#include <linux/ftrace.h>
32
33#include <asm/byteorder.h>
34#include <asm/cpu.h>
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1992 Ross Biro
7 * Copyright (C) Linus Torvalds
8 * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle

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27#include <linux/security.h>
28#include <linux/tracehook.h>
29#include <linux/audit.h>
30#include <linux/seccomp.h>
31#include <linux/ftrace.h>
32
33#include <asm/byteorder.h>
34#include <asm/cpu.h>
35#include <asm/cpu-info.h>
35#include <asm/dsp.h>
36#include <asm/fpu.h>
37#include <asm/mipsregs.h>
38#include <asm/mipsmtregs.h>
39#include <asm/pgtable.h>
40#include <asm/page.h>
41#include <asm/syscall.h>
42#include <asm/uaccess.h>
43#include <asm/bootinfo.h>
44#include <asm/reg.h>
45
46#define CREATE_TRACE_POINTS
47#include <trace/events/syscalls.h>
48
36#include <asm/dsp.h>
37#include <asm/fpu.h>
38#include <asm/mipsregs.h>
39#include <asm/mipsmtregs.h>
40#include <asm/pgtable.h>
41#include <asm/page.h>
42#include <asm/syscall.h>
43#include <asm/uaccess.h>
44#include <asm/bootinfo.h>
45#include <asm/reg.h>
46
47#define CREATE_TRACE_POINTS
48#include <trace/events/syscalls.h>
49
49static void init_fp_ctx(struct task_struct *target)
50{
51 /* If FP has been used then the target already has context */
52 if (tsk_used_math(target))
53 return;
54
55 /* Begin with data registers set to all 1s... */
56 memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr));
57
58 /* ...and FCSR zeroed */
59 target->thread.fpu.fcr31 = 0;
60
61 /*
62 * Record that the target has "used" math, such that the context
63 * just initialised, and any modifications made by the caller,
64 * aren't discarded.
65 */
66 set_stopped_child_used_math(target);
67}
68
69/*
70 * Called by kernel/ptrace.c when detaching..
71 *
72 * Make sure single step bits etc are not set.
73 */
74void ptrace_disable(struct task_struct *child)
75{
76 /* Don't load the watchpoint registers for the ex-child. */

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152
153 return 0;
154}
155
156int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
157{
158 union fpureg *fregs;
159 u64 fpr_val;
50/*
51 * Called by kernel/ptrace.c when detaching..
52 *
53 * Make sure single step bits etc are not set.
54 */
55void ptrace_disable(struct task_struct *child)
56{
57 /* Don't load the watchpoint registers for the ex-child. */

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133
134 return 0;
135}
136
137int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
138{
139 union fpureg *fregs;
140 u64 fpr_val;
141 u32 fcr31;
142 u32 value;
143 u32 mask;
160 int i;
161
162 if (!access_ok(VERIFY_READ, data, 33 * 8))
163 return -EIO;
164
144 int i;
145
146 if (!access_ok(VERIFY_READ, data, 33 * 8))
147 return -EIO;
148
165 init_fp_ctx(child);
166 fregs = get_fpu_regs(child);
167
168 for (i = 0; i < 32; i++) {
169 __get_user(fpr_val, i + (__u64 __user *)data);
170 set_fpr64(&fregs[i], 0, fpr_val);
171 }
172
149 fregs = get_fpu_regs(child);
150
151 for (i = 0; i < 32; i++) {
152 __get_user(fpr_val, i + (__u64 __user *)data);
153 set_fpr64(&fregs[i], 0, fpr_val);
154 }
155
173 __get_user(child->thread.fpu.fcr31, data + 64);
174 child->thread.fpu.fcr31 &= ~FPU_CSR_ALL_X;
156 __get_user(value, data + 64);
157 fcr31 = child->thread.fpu.fcr31;
158 mask = current_cpu_data.fpu_msk31;
159 child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask);
175
176 /* FIR may not be written. */
177
178 return 0;
179}
180
181int ptrace_get_watch_regs(struct task_struct *child,
182 struct pt_watch_regs __user *addr)

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455 const void *kbuf, const void __user *ubuf)
456{
457 unsigned i;
458 int err;
459 u64 fpr_val;
460
461 /* XXX fcr31 */
462
160
161 /* FIR may not be written. */
162
163 return 0;
164}
165
166int ptrace_get_watch_regs(struct task_struct *child,
167 struct pt_watch_regs __user *addr)

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440 const void *kbuf, const void __user *ubuf)
441{
442 unsigned i;
443 int err;
444 u64 fpr_val;
445
446 /* XXX fcr31 */
447
463 init_fp_ctx(target);
464
465 if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
466 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
467 &target->thread.fpu,
468 0, sizeof(elf_fpregset_t));
469
470 for (i = 0; i < NUM_FPU_REGS; i++) {
471 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
472 &fpr_val, i * sizeof(elf_fpreg_t),

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678
679 switch (addr) {
680 case 0 ... 31:
681 regs->regs[addr] = data;
682 break;
683 case FPR_BASE ... FPR_BASE + 31: {
684 union fpureg *fregs = get_fpu_regs(child);
685
448 if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
449 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
450 &target->thread.fpu,
451 0, sizeof(elf_fpregset_t));
452
453 for (i = 0; i < NUM_FPU_REGS; i++) {
454 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
455 &fpr_val, i * sizeof(elf_fpreg_t),

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661
662 switch (addr) {
663 case 0 ... 31:
664 regs->regs[addr] = data;
665 break;
666 case FPR_BASE ... FPR_BASE + 31: {
667 union fpureg *fregs = get_fpu_regs(child);
668
686 init_fp_ctx(child);
669 if (!tsk_used_math(child)) {
670 /* FP not yet used */
671 memset(&child->thread.fpu, ~0,
672 sizeof(child->thread.fpu));
673 child->thread.fpu.fcr31 = 0;
674 }
687#ifdef CONFIG_32BIT
688 if (test_thread_flag(TIF_32BIT_FPREGS)) {
689 /*
690 * The odd registers are actually the high
691 * order bits of the values stored in the even
692 * registers - unless we're using r2k_switch.S.
693 */
694 set_fpr32(&fregs[(addr & ~1) - FPR_BASE],

--- 136 unchanged lines hidden --- 		675#ifdef CONFIG_32BIT
676 if (test_thread_flag(TIF_32BIT_FPREGS)) {
677 /*
678 * The odd registers are actually the high
679 * order bits of the values stored in the even
680 * registers - unless we're using r2k_switch.S.
681 */
682 set_fpr32(&fregs[(addr & ~1) - FPR_BASE],

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